[PowerPC] Better fix for PR16556.

A more complete example of the bug in PR16556 was recently provided,
showing that the previous fix was not sufficient.  The previous fix is
reverted herein.

The real problem is that ReplaceNodeResults() uses LowerFP_TO_INT as
custom lowering for FP_TO_SINT during type legalization, without
checking whether the input type is handled by that routine.
LowerFP_TO_INT requires the input to be f32 or f64, so we fail when
the input is ppcf128.

I'm leaving the test case from the initial fix (r185821) in place, and
adding the new test as another crash-only check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185959 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 812f096cdd677351c679e7d8cbd763363e91a615..791d33406caf007bca8ddc71e5c8cb59b5f197cf 100644 (file)
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -4720,15 +4720,6 @@ SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
                                            SDLoc dl) const {
   assert(Op.getOperand(0).getValueType().isFloatingPoint());
   SDValue Src = Op.getOperand(0);
-
-  // If we have a long double here, it must be that we have an undef of
-  // that type.  In this case return an undef of the target type.
-  if (Src.getValueType() == MVT::ppcf128) {
-    assert(Src.getOpcode() == ISD::UNDEF && "Unhandled ppcf128!");
-    return DAG.getNode(ISD::UNDEF, dl,
-                       Op.getValueType().getSimpleVT().SimpleTy);
-  }
-
   if (Src.getValueType() == MVT::f32)
     Src = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Src);
 
@@ -5808,6 +5799,9 @@ void PPCTargetLowering::ReplaceNodeResults(SDNode *N,
     return;
   }
   case ISD::FP_TO_SINT:
+    // LowerFP_TO_INT() can only handle f32 and f64.
+    if (N->getOperand(0).getValueType() == MVT::ppcf128)
+      return;
     Results.push_back(LowerFP_TO_INT(SDValue(N, 0), DAG, dl));
     return;
   }

diff --git a/test/CodeGen/PowerPC/pr16556-2.ll b/test/CodeGen/PowerPC/pr16556-2.ll
new file mode 100644 (file)
index 0000000..f6328ac
--- /dev/null
+++ b/test/CodeGen/PowerPC/pr16556-2.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s\r
+\r
+; This test formerly failed because of wrong custom lowering for\r
+; fptosi of ppc_fp128.\r
+\r
+target datalayout = "E-p:32:32:32-S0-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:64:128-v64:64:64-v128:128:128-a0:0:64-n32"\r
+target triple = "powerpc-unknown-linux-gnu"\r
+\r
+%core.time.TickDuration = type { i64 }\r
+\r
+@_D4core4time12TickDuration11ticksPerSecyl = global i64 0\r
+@.str5 = internal unnamed_addr constant [40 x i8] c"..\5Cldc\5Cruntime\5Cdruntime\5Csrc\5Ccore\5Ctime.d\00"\r
+@.str83 = internal constant [10 x i8] c"null this\00"\r
+@.modulefilename = internal constant { i32, i8* } { i32 39, i8* getelementptr inbounds ([40 x i8]* @.str5, i32 0, i32 0) }\r
+\r
+declare i8* @_d_assert_msg({ i32, i8* }, { i32, i8* }, i32)\r
+\r
+\r
+define weak_odr fastcc i64 @_D4core4time12TickDuration30__T2toVAyaa7_7365636f6e6473TlZ2toMxFNaNbNfZl(%core.time.TickDuration* %.this_arg) {\r
+entry:\r
+  %unitsPerSec = alloca i64, align 8\r
+  %tmp = icmp ne %core.time.TickDuration* %.this_arg, null\r
+  br i1 %tmp, label %noassert, label %assert\r
+\r
+assert:                                           ; preds = %entry\r
+  %tmp1 = load { i32, i8* }* @.modulefilename\r
+  %0 = call i8* @_d_assert_msg({ i32, i8* } { i32 9, i8* getelementptr inbounds ([10 x i8]* @.str83, i32 0, i32 0) }, { i32, i8* } %tmp1, i32 1586)\r
+  unreachable\r
+\r
+noassert:                                         ; preds = %entry\r
+  %tmp2 = getelementptr %core.time.TickDuration* %.this_arg, i32 0, i32 0\r
+  %tmp3 = load i64* %tmp2\r
+  %tmp4 = sitofp i64 %tmp3 to ppc_fp128\r
+  %tmp5 = load i64* @_D4core4time12TickDuration11ticksPerSecyl\r
+  %tmp6 = sitofp i64 %tmp5 to ppc_fp128\r
+  %tmp7 = fdiv ppc_fp128 %tmp6, 0xM80000000000000000000000000000000\r
+  %tmp8 = fdiv ppc_fp128 %tmp4, %tmp7\r
+  %tmp9 = fptosi ppc_fp128 %tmp8 to i64\r
+  ret i64 %tmp9\r
+}\r
+\r