drm/radeon: add dpm UVD handling for r7xx asics
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Jun 2013 22:47:18 +0000 (18:47 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Jun 2013 23:15:46 +0000 (19:15 -0400)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/rv770_dpm.c
drivers/gpu/drm/radeon/rv770_dpm.h

index d15e7157a4bf10001aba3cd4edb470f744df1126..8cdad4fe3b8fb71bbf7472e7d20e1a6a95d69856 100644 (file)
@@ -1427,6 +1427,38 @@ int rv770_set_boot_state(struct radeon_device *rdev)
        return 0;
 }
 
+void rv770_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev)
+{
+       struct rv7xx_ps *new_state = rv770_get_ps(rdev->pm.dpm.requested_ps);
+       struct rv7xx_ps *current_state = rv770_get_ps(rdev->pm.dpm.current_ps);
+
+       if ((rdev->pm.dpm.requested_ps->vclk == rdev->pm.dpm.current_ps->vclk) &&
+           (rdev->pm.dpm.requested_ps->dclk == rdev->pm.dpm.current_ps->dclk))
+               return;
+
+       if (new_state->high.sclk >= current_state->high.sclk)
+               return;
+
+       radeon_set_uvd_clocks(rdev, rdev->pm.dpm.requested_ps->vclk,
+                             rdev->pm.dpm.requested_ps->dclk);
+}
+
+void rv770_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev)
+{
+       struct rv7xx_ps *new_state = rv770_get_ps(rdev->pm.dpm.requested_ps);
+       struct rv7xx_ps *current_state = rv770_get_ps(rdev->pm.dpm.current_ps);
+
+       if ((rdev->pm.dpm.requested_ps->vclk == rdev->pm.dpm.current_ps->vclk) &&
+           (rdev->pm.dpm.requested_ps->dclk == rdev->pm.dpm.current_ps->dclk))
+               return;
+
+       if (new_state->high.sclk < current_state->high.sclk)
+               return;
+
+       radeon_set_uvd_clocks(rdev, rdev->pm.dpm.requested_ps->vclk,
+                             rdev->pm.dpm.requested_ps->dclk);
+}
+
 int rv770_restrict_performance_levels_before_switch(struct radeon_device *rdev)
 {
        if (rv770_send_msg_to_smc(rdev, (PPSMC_Msg)(PPSMC_MSG_NoForcedLevel)) != PPSMC_Result_OK)
@@ -1961,6 +1993,7 @@ int rv770_dpm_set_power_state(struct radeon_device *rdev)
        struct rv7xx_power_info *pi = rv770_get_pi(rdev);
 
        rv770_restrict_performance_levels_before_switch(rdev);
+       rv770_set_uvd_clock_before_set_eng_clock(rdev);
        rv770_halt_smc(rdev);
        rv770_upload_sw_state(rdev);
        r7xx_program_memory_timing_parameters(rdev);
@@ -1970,6 +2003,7 @@ int rv770_dpm_set_power_state(struct radeon_device *rdev)
        rv770_set_sw_state(rdev);
        if (pi->dcodt)
                rv770_program_dcodt_after_state_switch(rdev);
+       rv770_set_uvd_clock_after_set_eng_clock(rdev);
        rv770_unrestrict_performance_levels_after_switch(rdev);
 
        return 0;
index 8cd878397f54a1b56e00abf6b2af56d297f1a7a1..f1c9da5ba40f2806b611a0c4d018a6743371ba95 100644 (file)
@@ -263,6 +263,8 @@ int rv770_resume_smc(struct radeon_device *rdev);
 int rv770_set_sw_state(struct radeon_device *rdev);
 int rv770_set_boot_state(struct radeon_device *rdev);
 int rv7xx_parse_power_table(struct radeon_device *rdev);
+void rv770_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev);
+void rv770_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev);
 
 /* smc */
 int rv770_read_smc_soft_register(struct radeon_device *rdev,