ARM: exynos5440: create a DT header defining CLK IDs
authorAndrzej Hajda <a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Tue, 7 Jan 2014 14:47:38 +0000 (15:47 +0100)
committerTomasz Figa <t.figa@samsung.com>
Wed, 8 Jan 2014 17:02:40 +0000 (18:02 +0100)
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.

Signed-off-by: Andrzej Hajda <a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Kyungmin Park <kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
include/dt-bindings/clock/exynos5440.h [new file with mode: 0644]

diff --git a/include/dt-bindings/clock/exynos5440.h b/include/dt-bindings/clock/exynos5440.h
new file mode 100644 (file)
index 0000000..70cd850
--- /dev/null
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Andrzej Haja <a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants for Exynos5440 clock controller.
+*/
+
+#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5440_H
+#define _DT_BINDINGS_CLOCK_EXYNOS_5440_H
+
+#define CLK_XTAL               1
+#define CLK_ARM_CLK            2
+#define CLK_SPI_BAUD           16
+#define CLK_PB0_250            17
+#define CLK_PR0_250            18
+#define CLK_PR1_250            19
+#define CLK_B_250              20
+#define CLK_B_125              21
+#define CLK_B_200              22
+#define CLK_SATA               23
+#define CLK_USB                        24
+#define CLK_GMAC0              25
+#define CLK_CS250              26
+#define CLK_PB0_250_O          27
+#define CLK_PR0_250_O          28
+#define CLK_PR1_250_O          29
+#define CLK_B_250_O            30
+#define CLK_B_125_O            31
+#define CLK_B_200_O            32
+#define CLK_SATA_O             33
+#define CLK_USB_O              34
+#define CLK_GMAC0_O            35
+#define CLK_CS250_O            36
+
+/* must be greater than maximal clock id */
+#define CLK_NR_CLKS            37
+
+#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5440_H */