status = "okay";
};
+&u2phy {
+ vbus_host-gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+};
+
&dwc_control_usb {
- host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
rockchip,remote_wakeup;
rockchip,usb_irq_wakeup;
};
-&usb_host0_echi {
+&usb_host0_ehci {
+ assigned-clocks = <&cru SCLK_USBPHY480M>;
+ assigned-clock-parents = <&u2phy>;
status = "okay";
};
reset-names = "otg_ahb", "otg_phy", "otg_controller";
/* 0 - Normal, 1 - Force Host, 2 - Force Device */
rockchip,usb-mode = <0>;
- assigned-clocks = <&cru SCLK_USBPHY480M>;
- assigned-clock-parents = <&usbphy0>;
status = "okay";
};
status = "disabled";
};
- usbphy: phy {
- compatible = "rockchip,rk336x-usb-phy";
- rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- usbphy0: usb-phy0 {
- #phy-cells = <0>;
- #clock-cells = <0>;
- reg = <0x700>;
- };
-
- usbphy1: usb-phy1 {
- #phy-cells = <0>;
- #clock-cells = <0>;
- reg = <0x728>;
- };
- };
-
- usb_host0_echi: usb@ff480000 {
+ usb_host0_ehci: usb@ff480000 {
compatible = "generic-ehci";
reg = <0x0 0xff480000 0x0 0x20000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_HOST>;
clock-names = "sclk_otgphy0", "hclk_host0";
- phys = <&usbphy1>;
+ phys = <&u2phy_host>;
phy-names = "usb";
status = "disabled";
};
};
grf: syscon@ff770000 {
- compatible = "rockchip,rk3366-grf", "syscon";
+ compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd";
reg = <0x0 0xff770000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u2phy: usb2-phy {
+ compatible = "rockchip,rk3366-usb2phy";
+ #clock-cells = <0>;
+ clock-output-names = "sclk_otgphy0_480m";
+
+ u2phy_host: host-port {
+ #phy-cells = <0>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "linestate";
+ status = "okay";
+ };
+ };
};
wdt: watchdog@ff800000 {