ARM: SPEAr13xx: DT: Add spics gpio controller nodes

SPEAr platform provides a provision to control chipselects of ARM PL022 Prime
Cell spi controller through its system registers, which otherwise remains under
PL022 control which some protocols do not want.

This patch adds spics controller nodes in device tree for various SPEAr13xx
SoCs.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 7cd25eb4f8e00a14c317fbbc46854bd7641bdeb9..f489f648c6ebd9127771125f5f5fc303e765aca6 100644 (file)
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -17,6 +17,18 @@
        compatible = "st,spear1310";
 
        ahb {
+               spics: spics@e0700000{
+                       compatible = "st,spear-spics-gpio";
+                       reg = <0xe0700000 0x1000>;
+                       st-spics,peripcfg-reg = <0x3b0>;
+                       st-spics,sw-enable-bit = <12>;
+                       st-spics,cs-value-bit = <11>;
+                       st-spics,cs-enable-mask = <3>;
+                       st-spics,cs-enable-shift = <8>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
                ahci@b1000000 {
                        compatible = "snps,spear-ahci";
                        reg = <0xb1000000 0x10000>;

diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index 6c09eb0a1b2bbad90683f7311c14f052a2e21ac7..64d14fde215d4f5dd6ba03bedaac3b9993a36643 100644 (file)
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -17,6 +17,20 @@
        compatible = "st,spear1340";
 
        ahb {
+
+               spics: spics@e0700000{
+                       compatible = "st,spear-spics-gpio";
+                       reg = <0xe0700000 0x1000>;
+                       st-spics,peripcfg-reg = <0x42c>;
+                       st-spics,sw-enable-bit = <21>;
+                       st-spics,cs-value-bit = <20>;
+                       st-spics,cs-enable-mask = <3>;
+                       st-spics,cs-enable-shift = <18>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
                ahci@b1000000 {
                        compatible = "snps,spear-ahci";
                        reg = <0xb1000000 0x10000>;