//===----------------------------------------------------------------------===//
// Load BDX-style addresses.
-let neverHasSideEffects = 1, Function = "la" in {
+let neverHasSideEffects = 1, isAsCheapAsAMove = 1, isReMaterializable = 1,
+ Function = "la" in {
let PairType = "12" in
def LA : InstRX<0x41, (outs GR64:$R1), (ins laaddr12pair:$XBD2),
"la\t$R1, $XBD2",
// Load a PC-relative address. There's no version of this instruction
// with a 16-bit offset, so there's no relaxation.
-let neverHasSideEffects = 1 in {
+let neverHasSideEffects = 1, isAsCheapAsAMove = 1, isMoveImm = 1,
+ isReMaterializable = 1 in {
def LARL : InstRIL<0xC00, (outs GR64:$R1), (ins pcrel32:$I2),
"larl\t$R1, $I2",
[(set GR64:$R1, pcrel32:$I2)]>;
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+declare void @foo(i32 *)
+
; The CFA offset is 160 (the caller-allocated part of the frame) + 168.
define void @f1(i64 %x) {
; CHECK: f1:
store volatile i64 %x, i64* %ptr
ret void
}
+
+; Make sure that LA can be rematerialized.
+define void @f8() {
+; CHECK: f8:
+; CHECK: la %r2, 164(%r15)
+; CHECK: brasl %r14, foo@PLT
+; CHECK: la %r2, 164(%r15)
+; CHECK: brasl %r14, foo@PLT
+; CHECK: br %r14
+ %ptr = alloca i32
+ call void @foo(i32 *%ptr)
+ call void @foo(i32 *%ptr)
+ ret void
+}
ret void
}
+declare void @foo(i32 *)
+
; Test a load of a fully-aligned external variable.
define i32 *@f1() {
; CHECK: f1:
; CHECK-NEXT: br %r14
ret void() *@df
}
+
+; Test that LARL can be rematerialized.
+define i32 @f9() {
+; CHECK: f9:
+; CHECK: larl %r2, d2
+; CHECK: brasl %r14, foo@PLT
+; CHECK: larl %r2, d2
+; CHECK: brasl %r14, foo@PLT
+; CHECK: br %r14
+ call void @foo(i32 *@d2)
+ call void @foo(i32 *@d2)
+ ret i32 0
+}
;
; CHECK: main:
; CHECK: aghi %r15, -568
-; CHECK: la [[MAIN_ARR:%r[0-9]+]], 164(%r11)
-; CHECK: lgr %r2, [[MAIN_ARR]]
+; CHECK: la %r2, 164(%r11)
; CHECK: brasl %r14, populate_array@PLT
;
; Now check that the debugging information reflects this: