rk3288: add vcodec_service to defconfig, enable vcodec clocks

diff --git a/arch/arm/configs/rockchip_defconfig b/arch/arm/configs/rockchip_defconfig
index 0dd26c8fa5a2ea2fde004b19e0b18882cc3e7051..f4e007c002e3a3decc34c72fbdcaed7aead7f820 100755 (executable)
--- a/arch/arm/configs/rockchip_defconfig
+++ b/arch/arm/configs/rockchip_defconfig
@@ -34,7 +34,8 @@ CONFIG_PARTITION_ADVANCED=y
 # CONFIG_MSDOS_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
 CONFIG_ARCH_ROCKCHIP=y
-# CONFIG_RK_VCODEC is not set
+# CONFIG_RK_VPU is not set
+CONFIG_RK_VCODEC=y
 # CONFIG_SWP_EMULATE is not set
 CONFIG_ARM_ERRATA_720789=y
 CONFIG_PL310_ERRATA_753970=y

diff --git a/arch/arm/mach-rockchip/vcodec_service.c b/arch/arm/mach-rockchip/vcodec_service.c
index a80c578d5c3e73b57af9a82bc8e594573ef1d0c5..7961462c93bbd2dc6cf7b43d389e4a8e781f0c7e 100755 (executable)
--- a/arch/arm/mach-rockchip/vcodec_service.c
+++ b/arch/arm/mach-rockchip/vcodec_service.c
@@ -55,6 +55,7 @@
 \r
 #define HEVC_TEST_ENABLE    0\r
 #define HEVC_SIM_ENABLE                0\r
+#define VCODEC_CLOCK_ENABLE 1\r
 \r
 typedef enum {\r
        VPU_DEC_ID_9190         = 0x6731,\r
@@ -304,6 +305,7 @@ static const struct file_operations debug_vcodec_fops = {
 \r
 static void vpu_get_clk(struct vpu_service_info *pservice)\r
 {\r
+#if VCODEC_CLOCK_ENABLE\r
        /*pd_video      = clk_get(NULL, "pd_video");\r
        if (IS_ERR(pd_video)) {\r
                pr_err("failed on clk_get pd_video\n");\r
@@ -330,10 +332,12 @@ static void vpu_get_clk(struct vpu_service_info *pservice)
                        dev_err(pservice->dev, "failed on clk_get clk_cabac\n");\r
                }\r
        }\r
+#endif\r
 }\r
 \r
 static void vpu_put_clk(struct vpu_service_info *pservice)\r
 {\r
+#if VCODEC_CLOCK_ENABLE\r
     //clk_put(pd_video);\r
 \r
     if (pservice->aclk_vcodec) {\r
@@ -344,7 +348,7 @@ static void vpu_put_clk(struct vpu_service_info *pservice)
         devm_clk_put(pservice->dev, pservice->hclk_vcodec);\r
     }\r
 \r
-    if (pservice->hw_info->hw_id == HEVC_ID) {\r
+    if (pservice->dev_id == VCODEC_DEVICE_ID_HEVC) {\r
         if (pservice->clk_core) {\r
             devm_clk_put(pservice->dev, pservice->clk_core);\r
         }\r
@@ -353,6 +357,7 @@ static void vpu_put_clk(struct vpu_service_info *pservice)
             devm_clk_put(pservice->dev, pservice->clk_cabac);\r
         }\r
     }\r
+#endif\r
 }\r
 \r
 static void vpu_reset(struct vpu_service_info *pservice)\r
@@ -447,17 +452,17 @@ static void vpu_service_power_off(struct vpu_service_info *pservice)
                vpu_service_dump(pservice);\r
        }\r
 \r
-       printk("vpu: power off...");\r
+       printk("%s: power off...", dev_name(pservice->dev));\r
 #ifdef CONFIG_ARCH_RK29\r
        pmu_set_power_domain(PD_VCODEC, false);\r
 #else\r
        //clk_disable(pd_video);\r
 #endif\r
        udelay(10);\r
-#if 0\r
+#if VCODEC_CLOCK_ENABLE\r
        clk_disable_unprepare(pservice->hclk_vcodec);\r
        clk_disable_unprepare(pservice->aclk_vcodec);\r
-    if (pservice->hw_info->hw_id == HEVC_ID) {\r
+    if (pservice->dev_id == VCODEC_DEVICE_ID_HEVC) {\r
         clk_disable_unprepare(pservice->clk_core);\r
         clk_disable_unprepare(pservice->clk_cabac);\r
     }\r
@@ -498,12 +503,13 @@ static void vpu_service_power_on(struct vpu_service_info *pservice)
                return ;\r
 \r
        pservice->enabled = true;\r
-       printk("vpu: power on\n");\r
+       printk("%s: power on\n", dev_name(pservice->dev));\r
 \r
-#if 0\r
+#if VCODEC_CLOCK_ENABLE\r
     clk_prepare_enable(pservice->aclk_vcodec);\r
        clk_prepare_enable(pservice->hclk_vcodec);\r
-    if (pservice->hw_info->hw_id == HEVC_ID) {\r
+\r
+    if (pservice->dev_id == VCODEC_DEVICE_ID_HEVC) {\r
         clk_prepare_enable(pservice->clk_core);\r
         clk_prepare_enable(pservice->clk_cabac);\r
     }\r
@@ -1674,8 +1680,7 @@ static irqreturn_t vdpu_irq(int irq, void *dev_id)
 {\r
     struct vpu_service_info *pservice = (struct vpu_service_info*)dev_id;\r
     vpu_device *dev = &pservice->dec_dev;\r
-       u32 irq_status = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);\r
-    int i;\r
+    u32 irq_status = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);\r
 \r
        pr_debug("dec_irq\n");\r
 \r