R600/SI: add constant for inline zero operand

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175747 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index cf0d5b936ae8b40c224c644cad7e7628c6a01c35..8b90d45645c031062a61ed67f17404e5f9f42b37 100644 (file)
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -49,9 +49,8 @@ class InlineImm <ValueType vt> : ImmLeaf <vt, [{
 // SI assembler operands
 //===----------------------------------------------------------------------===//
 
-class SIOperand <ValueType vt, dag opInfo>: Operand <vt> {
-  let EncoderMethod = "encodeOperand";
-  let MIOperandInfo = opInfo;
+def SIOperand {
+  int ZERO = 0x80;
 }
 
 class GPR4Align <RegisterClass rc> : Operand <vAny> {
@@ -201,7 +200,7 @@ multiclass VOPC_Helper <bits<8> op, RegisterClass vrc, RegisterClass arc,
          InstFlag:$omod, InstFlag:$neg),
     opName, pattern
   > {
-    let SRC2 = 0x80;
+    let SRC2 = SIOperand.ZERO;
   }
 }