video: rockchip: lcdc: 3288: update for VOP YUV420 to HDMI

Change-Id: I3dbe2208e10318acf99b66e858d853c3d4efab04
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

diff --git a/drivers/video/rockchip/lcdc/rk3288_lcdc.c b/drivers/video/rockchip/lcdc/rk3288_lcdc.c
index 95ab2ef706a4c43e042fdbd29b910e5705c03b40..55e9dc236dd032ea8d6543f9ba0e429e84d0de74 100755 (executable)
--- a/drivers/video/rockchip/lcdc/rk3288_lcdc.c
+++ b/drivers/video/rockchip/lcdc/rk3288_lcdc.c
@@ -1216,6 +1216,7 @@ static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
        u32 mask, val;
        u16 h_total,v_total;
        int ret = 0;
+       int hdmi_dclk_out_en = 0;
 
        if (unlikely(!lcdc_dev->clk_on)) {
                pr_info("%s,clk_on = %d\n", __func__, lcdc_dev->clk_on);
@@ -1282,6 +1283,7 @@ static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
                        lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
                        break;
                case OUT_YUV_420:
+                       hdmi_dclk_out_en = 1;
                        face = OUT_YUV_420;
                        dclk_ddr = 1;
                        mask = m_DITHER_DOWN_EN | m_DITHER_UP_EN |
@@ -1291,6 +1293,7 @@ static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
                        lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
                        break;
                case OUT_YUV_420_10BIT:
+                       hdmi_dclk_out_en = 1;
                        face = OUT_YUV_420;
                        dclk_ddr = 1;
                        mask = m_DITHER_DOWN_EN | m_DITHER_UP_EN |
@@ -1323,7 +1326,9 @@ static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
                        v |= (lcdc_dev->id << 3);
                        break;
                case SCREEN_HDMI:
-                       face = OUT_P101010;/*RGB 101010 output*/
+                       if ((screen->face == OUT_P888) ||
+                           (screen->face == OUT_P101010))
+                               face = OUT_P101010;/*RGB 101010 output*/
                        mask = m_HDMI_OUT_EN;
                        val = v_HDMI_OUT_EN(1);
                        break;
@@ -1341,6 +1346,10 @@ static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
                        val = v_EDP_OUT_EN(1);
                        break;
                }
+               if (dev_drv->version == VOP_FULL_RK3288_V1_1) {
+                       mask |= m_HDMI_DCLK_OUT_EN;
+                       val |= v_HDMI_DCLK_OUT_EN(hdmi_dclk_out_en);
+               }
                lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 #ifndef CONFIG_RK_FPGA
                writel_relaxed(v, RK_GRF_VIRT + RK3288_GRF_SOC_CON6);

diff --git a/drivers/video/rockchip/lcdc/rk3288_lcdc.h b/drivers/video/rockchip/lcdc/rk3288_lcdc.h
index 7462bb59d4e7f058b5d4e2e2fcaa0f6d1576f592..d83e4daa9cc4cb217c94e8f86ccb8f9efad13fb9 100755 (executable)
--- a/drivers/video/rockchip/lcdc/rk3288_lcdc.h
+++ b/drivers/video/rockchip/lcdc/rk3288_lcdc.h
@@ -22,6 +22,7 @@
 #define v_EDPI_HALT_EN(x)              (((x)&1)<<8)
 #define v_EDPI_WMS_MODE(x)              (((x)&1)<<9)
 #define v_EDPI_WMS_FS(x)                (((x)&1)<<10)
+#define v_HDMI_DCLK_OUT_EN(x)          (((x)&1)<<11)
 #define v_RGB_OUT_EN(x)                 (((x)&1)<<12)
 #define v_HDMI_OUT_EN(x)                (((x)&1)<<13)
 #define v_EDP_OUT_EN(x)                 (((x)&1)<<14)
@@ -39,6 +40,7 @@
 #define m_EDPI_HALT_EN                 (1<<8)
 #define m_EDPI_WMS_MODE                 (1<<9)
 #define m_EDPI_WMS_FS                   (1<<10)
+#define m_HDMI_DCLK_OUT_EN             (1<<11)
 #define m_RGB_OUT_EN                    (1<<12)
 #define m_HDMI_OUT_EN                   (1<<13)
 #define m_EDP_OUT_EN                    (1<<14)
@@ -1064,7 +1066,7 @@
 #define m_BCSH_SIN_HUE                 (0x1ff<<0)
 #define m_BCSH_COS_HUE                 (0x1ff<<16)
 
-#define BCSH_CTRL                      (0x01b8)
+#define BCSH_CTRL                      (0x01bc)
 #define v_BCSH_Y2R_EN(x)               (((x)&0x1)<<0)
 #define v_BCSH_R2Y_EN(x)               (((x)&0x1)<<4)
 #define m_BCSH_Y2R_EN                  (0x1<<0)