Make the verifier a little quieter on instructions that it's probably
authorEric Christopher <echristo@apple.com>
Tue, 16 Nov 2010 01:58:21 +0000 (01:58 +0000)
committerEric Christopher <echristo@apple.com>
Tue, 16 Nov 2010 01:58:21 +0000 (01:58 +0000)
(and likely) wrong about anyhow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119320 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/MachineVerifier.cpp

index 8ada60a55331426db1d2b8c0ab9f5864d7b2be5b..47a94b35c76ad3e9ab313ac83da6215f464d8e2f 100644 (file)
@@ -558,7 +558,9 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
     else if (MO->isImplicit())
       report("Explicit definition marked as implicit", MO, MONum);
   } else if (MONum < TI.getNumOperands()) {
-    if (MO->isReg()) {
+    // Don't check if it's a variadic instruction. See, e.g., LDM_RET in the arm
+    // back end.
+    if (MO->isReg() && MONum != TI.getNumOperands()-1) {
       if (MO->isDef())
         report("Explicit operand marked as def", MO, MONum);
       if (MO->isImplicit())