Always select target registers to themselves

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25218 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index 75780c4d3ed0c23ff050a99290e595abfd6129d2..228f6bff5faee7a2de4124ffb34412e6895236e4 100644 (file)
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -2547,6 +2547,7 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
      << "  default: break;\n"
      << "  case ISD::EntryToken:       // These leaves remain the same.\n"
      << "  case ISD::BasicBlock:\n"
+     << "  case ISD::Register:\n"
      << "    return N;\n"
      << "  case ISD::AssertSext:\n"
      << "  case ISD::AssertZext: {\n"