Changed the table generator so that the X86

disassembler never recognizes InitReg instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97017 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index 3843e56d9858b9a5560d02ac0f098f4999b10dff..ea78d4193eaf7595f60f2049735498fdad0726a8 100644 (file)
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -282,6 +282,10 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
       IsCodeGenOnly)
     return FILTER_STRONG;
   
+  if (Form == X86Local::MRMInitReg)
+    return FILTER_STRONG;
+
+  
   // Filter out instructions with a LOCK prefix;
   //   prefer forms that do not have the prefix
   if (HasLockPrefix)
@@ -353,9 +357,6 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
   if (AsmString.find("subreg") != AsmString.npos)
     return FILTER_STRONG;
 
-  assert(Form != X86Local::MRMInitReg &&
-         "FORMAT_MRMINITREG instruction not skipped");
-  
   if (HasFROperands && Name.find("MOV") != Name.npos &&
      ((Name.find("2") != Name.npos && Name.find("32") == Name.npos) || 
       (Name.find("to") != Name.npos)))