AArch64: treat HFAs containing "half" types as blocks too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223669 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64CallingConvention.h b/lib/Target/AArch64/AArch64CallingConvention.h
index 8c798b71becebe355645836ca2803bc4df2c2bc9..baf80bc5483de0c1453c7551d0c4a5556dafa1d3 100644 (file)
--- a/lib/Target/AArch64/AArch64CallingConvention.h
+++ b/lib/Target/AArch64/AArch64CallingConvention.h
@@ -28,6 +28,9 @@ using namespace llvm;
 static const uint16_t XRegList[] = {AArch64::X0, AArch64::X1, AArch64::X2,
                                     AArch64::X3, AArch64::X4, AArch64::X5,
                                     AArch64::X6, AArch64::X7};
+static const uint16_t HRegList[] = {AArch64::H0, AArch64::H1, AArch64::H2,
+                                    AArch64::H3, AArch64::H4, AArch64::H5,
+                                    AArch64::H6, AArch64::H7};
 static const uint16_t SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2,
                                     AArch64::S3, AArch64::S4, AArch64::S5,
                                     AArch64::S6, AArch64::S7};
@@ -88,6 +91,8 @@ static bool CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
   ArrayRef<uint16_t> RegList;
   if (LocVT.SimpleTy == MVT::i64)
     RegList = XRegList;
+  else if (LocVT.SimpleTy == MVT::f16)
+    RegList = HRegList;
   else if (LocVT.SimpleTy == MVT::f32 || LocVT.is32BitVector())
     RegList = SRegList;
   else if (LocVT.SimpleTy == MVT::f64 || LocVT.is64BitVector())

diff --git a/test/CodeGen/AArch64/argument-blocks.ll b/test/CodeGen/AArch64/argument-blocks.ll
index 9204da8d7ebefd90e970c3868223b0a0934b96df..f1dcfa67d0eb8e738feefaef7ca94e047f0ec3b9 100644 (file)
--- a/test/CodeGen/AArch64/argument-blocks.ll
+++ b/test/CodeGen/AArch64/argument-blocks.ll
@@ -188,3 +188,10 @@ define <16 x i8> @test_v16i8_blocked([7 x double], [2 x <16 x i8>] %in) {
   %val = extractvalue [2 x <16 x i8>] %in, 0
   ret <16 x i8> %val
 }
+
+define half @test_f16_blocked([7 x double], [2 x half] %in) {
+; CHECK-LABEL: test_f16_blocked:
+; CHECK: ldr h0, [sp]
+  %val = extractvalue [2 x half] %in, 0
+  ret half %val
+}