clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1

Change-Id: Icd566864d3651e7b64ee8209b66e8a326011422f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 0ee8de6291577ec7df037bd85546298053170036..4e39e423b9d69f980ce1eebd9916b48e678dcf1f 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -429,9 +429,9 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
        GATE(SCLK_USB2PHY1_REF, "clk_usb2phy1_ref", "xin24m", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(6), 6, GFLAGS),
 
-       GATE(0, "clk_usbphy0_480m_src", "clk_usbphy0_480m", CLK_IGNORE_UNUSED,
+       GATE(SCLK_USBPHY0_480M_SRC, "clk_usbphy0_480m_src", "clk_usbphy0_480m", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(13), 12, GFLAGS),
-       GATE(0, "clk_usbphy1_480m_src", "clk_usbphy1_480m", CLK_IGNORE_UNUSED,
+       GATE(SCLK_USBPHY1_480M_SRC, "clk_usbphy1_480m_src", "clk_usbphy1_480m", CLK_IGNORE_UNUSED,
                        RK3399_CLKGATE_CON(13), 12, GFLAGS),
        MUX(0, "clk_usbphy_480m", mux_usbphy_480m_p, CLK_IGNORE_UNUSED,
                        RK3399_CLKSEL_CON(14), 6, 1, MFLAGS),

diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index 2290123f61e6d7d5c13f134735fc59c8463e4160..a5ff9f9263eb42d10a88d971ec37df9399554442 100644 (file)
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -131,6 +131,8 @@
 #define SCLK_DPHY_RX0_CFG              165
 #define SCLK_RMII_SRC                  166
 #define SCLK_PCIEPHY_REF100M           167
+#define SCLK_USBPHY0_480M_SRC          168
+#define SCLK_USBPHY1_480M_SRC          169
 
 #define DCLK_VOP0                      180
 #define DCLK_VOP1                      181