Merge branch 'turbostat' of https://git.kernel.org/pub/scm/linux/kernel/git/lenb...

Pull turbostat changes for v4.3 from Len Brown.

* 'turbostat' of https://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
  tools/power turbostat: fix typo on DRAM column in Joules-mode
  tools/power turbostat: fix parameter passing for forked command
  tools/power turbostat: dump CONFIG_TDP
  tools/power turbostat: cpu0 is no longer hard-coded, so  update output
  tools/power turbostat: update turbostat(8)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 9ebc3d0093736bcc2e62646a89fbac1f75c878d7..6deb8e3b71a78cb484ab3aa136d8caf12fc50567 100644 (file)
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -170,6 +170,12 @@
 #define MSR_PP1_ENERGY_STATUS          0x00000641
 #define MSR_PP1_POLICY                 0x00000642
 
+#define MSR_CONFIG_TDP_NOMINAL         0x00000648
+#define MSR_CONFIG_TDP_LEVEL_1         0x00000649
+#define MSR_CONFIG_TDP_LEVEL_2         0x0000064A
+#define MSR_CONFIG_TDP_CONTROL         0x0000064B
+#define MSR_TURBO_ACTIVATION_RATIO     0x0000064C
+
 #define MSR_PKG_WEIGHTED_CORE_C0_RES   0x00000658
 #define MSR_PKG_ANY_CORE_C0_RES                0x00000659
 #define MSR_PKG_ANY_GFXE_C0_RES                0x0000065A

diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8
index 05b8fc38dc8bca83178372151b980c68f6d65ea4..622db685b4f9930ab4c2f67aadf947969652371f 100644 (file)
--- a/tools/power/x86/turbostat/turbostat.8
+++ b/tools/power/x86/turbostat/turbostat.8
@@ -251,11 +251,6 @@ Although it is not guaranteed by the architecture, turbostat assumes
 that they count at TSC rate, which is true on all processors tested to date.
 
 .SH REFERENCES
-"Intel® Turbo Boost Technology
-in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
-http://download.intel.com/design/processor/applnots/320354.pdf
-
-"Intel® 64 and IA-32 Architectures Software Developer's Manual
 Volume 3B: System Programming Guide"
 http://www.intel.com/products/processor/manuals/
 

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 323b65edfc970b5ba5783de3c16f8b684728e47b..9655cb49c7cb8eb6427b078e0472451b777b9910 100644 (file)
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -372,7 +372,7 @@ void print_header(void)
                if (do_rapl & RAPL_GFX)
                        outp += sprintf(outp, "   GFX_J");
                if (do_rapl & RAPL_DRAM)
-                       outp += sprintf(outp, "   RAM_W");
+                       outp += sprintf(outp, "   RAM_J");
                if (do_rapl & RAPL_PKG_PERF_STATUS)
                        outp += sprintf(outp, "   PKG_%%");
                if (do_rapl & RAPL_DRAM_PERF_STATUS)
@@ -1157,7 +1157,7 @@ dump_nhm_platform_info(void)
 
        get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
 
-       fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);
+       fprintf(stderr, "cpu%d: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
 
        ratio = (msr >> 40) & 0xFF;
        fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
@@ -1168,8 +1168,8 @@ dump_nhm_platform_info(void)
                ratio, bclk, ratio * bclk);
 
        get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
-       fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
-               msr, msr & 0x2 ? "EN" : "DIS");
+       fprintf(stderr, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
+               base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
 
        return;
 }
@@ -1182,7 +1182,7 @@ dump_hsw_turbo_ratio_limits(void)
 
        get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
 
-       fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", msr);
+       fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
 
        ratio = (msr >> 8) & 0xFF;
        if (ratio)
@@ -1204,7 +1204,7 @@ dump_ivt_turbo_ratio_limits(void)
 
        get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
 
-       fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", msr);
+       fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
 
        ratio = (msr >> 56) & 0xFF;
        if (ratio)
@@ -1256,7 +1256,7 @@ dump_nhm_turbo_ratio_limits(void)
 
        get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
 
-       fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
+       fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
 
        ratio = (msr >> 56) & 0xFF;
        if (ratio)
@@ -1312,8 +1312,8 @@ dump_knl_turbo_ratio_limits(void)
 
        get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
 
-       fprintf(stderr, "cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n",
-       msr);
+       fprintf(stderr, "cpu%d: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n",
+               base_cpu, msr);
 
        /**
         * Turbo encoding in KNL is as follows:
@@ -1371,7 +1371,7 @@ dump_nhm_cst_cfg(void)
 #define SNB_C1_AUTO_UNDEMOTE              (1UL << 27)
 #define SNB_C3_AUTO_UNDEMOTE              (1UL << 28)
 
-       fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
+       fprintf(stderr, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
 
        fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
                (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
@@ -1384,6 +1384,49 @@ dump_nhm_cst_cfg(void)
        return;
 }
 
+static void
+dump_config_tdp(void)
+{
+       unsigned long long msr;
+
+       get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
+       fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
+       fprintf(stderr, " (base_ratio=%d)\n", (unsigned int)msr & 0xEF);
+
+       get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
+       fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
+       if (msr) {
+               fprintf(stderr, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
+               fprintf(stderr, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
+               fprintf(stderr, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
+               fprintf(stderr, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0xEFFF);
+       }
+       fprintf(stderr, ")\n");
+
+       get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
+       fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
+       if (msr) {
+               fprintf(stderr, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
+               fprintf(stderr, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
+               fprintf(stderr, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
+               fprintf(stderr, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0xEFFF);
+       }
+       fprintf(stderr, ")\n");
+
+       get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
+       fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
+       if ((msr) & 0x3)
+               fprintf(stderr, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
+       fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
+       fprintf(stderr, ")\n");
+       
+       get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
+       fprintf(stderr, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
+       fprintf(stderr, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xEF);
+       fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
+       fprintf(stderr, ")\n");
+}
+
 void free_all_buffers(void)
 {
        CPU_FREE(cpu_present_set);
@@ -1873,6 +1916,36 @@ int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
                return 0;
        }
 }
+int has_config_tdp(unsigned int family, unsigned int model)
+{
+       if (!genuine_intel)
+               return 0;
+
+       if (family != 6)
+               return 0;
+
+       switch (model) {
+       case 0x3A:      /* IVB */
+       case 0x3E:      /* IVB Xeon */
+
+       case 0x3C:      /* HSW */
+       case 0x3F:      /* HSX */
+       case 0x45:      /* HSW */
+       case 0x46:      /* HSW */
+       case 0x3D:      /* BDW */
+       case 0x47:      /* BDW */
+       case 0x4F:      /* BDX */
+       case 0x56:      /* BDX-DE */
+       case 0x4E:      /* SKL */
+       case 0x5E:      /* SKL */
+
+       case 0x57:      /* Knights Landing */
+               return 1;
+       default:
+               return 0;
+       }
+}
+
 static void
 dump_cstate_pstate_config_info(family, model)
 {
@@ -1893,6 +1966,9 @@ dump_cstate_pstate_config_info(family, model)
        if (has_knl_turbo_ratio_limit(family, model))
                dump_knl_turbo_ratio_limits();
 
+       if (has_config_tdp(family, model))
+               dump_config_tdp();
+
        dump_nhm_cst_cfg();
 }
 
@@ -3014,7 +3090,7 @@ int get_and_dump_counters(void)
 }
 
 void print_version() {
-       fprintf(stderr, "turbostat version 4.7 27-May, 2015"
+       fprintf(stderr, "turbostat version 4.7 17-June, 2015"
                " - Len Brown <lenb@kernel.org>\n");
 }
 
@@ -3042,7 +3118,7 @@ void cmdline(int argc, char **argv)
 
        progname = argv[0];
 
-       while ((opt = getopt_long_only(argc, argv, "C:c:Ddhi:JM:m:PpST:v",
+       while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:PpST:v",
                                long_options, &option_index)) != -1) {
                switch (opt) {
                case 'C':