[Sparc] Add fcmpe* instructions to Sparc backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202661 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
index 7a8a66341cec33878a581cb3a262bbd7e63e46de..045c99087a42d368cd3d4780589a8ea9145d844c 100644 (file)
--- a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
+++ b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
@@ -69,9 +69,8 @@ bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O)
       return true;
     }
   }
-  case SP::V9FCMPS:
-  case SP::V9FCMPD:
-  case SP::V9FCMPQ: {
+  case SP::V9FCMPS:  case SP::V9FCMPD:  case SP::V9FCMPQ:
+  case SP::V9FCMPES: case SP::V9FCMPED: case SP::V9FCMPEQ: {
     if (isV9()
         || (MI->getNumOperands() != 3)
         || (!MI->getOperand(0).isReg())
@@ -80,9 +79,12 @@ bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O)
     // if V8, skip printing %fcc0.
     switch(MI->getOpcode()) {
     default:
-    case SP::V9FCMPS: O << "\tfcmps "; break;
-    case SP::V9FCMPD: O << "\tfcmpd "; break;
-    case SP::V9FCMPQ: O << "\tfcmpq "; break;
+    case SP::V9FCMPS:  O << "\tfcmps "; break;
+    case SP::V9FCMPD:  O << "\tfcmpd "; break;
+    case SP::V9FCMPQ:  O << "\tfcmpq "; break;
+    case SP::V9FCMPES: O << "\tfcmpes "; break;
+    case SP::V9FCMPED: O << "\tfcmped "; break;
+    case SP::V9FCMPEQ: O << "\tfcmpeq "; break;
     }
     printOperand(MI, 1, O);
     O << ", ";

diff --git a/lib/Target/Sparc/SparcInstrAliases.td b/lib/Target/Sparc/SparcInstrAliases.td
index 0ab93706df6ed3de9d2d6c27b631d35b81cacbf7..a77f248e43e7ded8d24222734a8bb54066d37376 100644 (file)
--- a/lib/Target/Sparc/SparcInstrAliases.td
+++ b/lib/Target/Sparc/SparcInstrAliases.td
@@ -260,3 +260,10 @@ def : InstAlias<"fcmps $rs1, $rs2", (V9FCMPS FCC0, FPRegs:$rs1, FPRegs:$rs2)>;
 def : InstAlias<"fcmpd $rs1, $rs2", (V9FCMPD FCC0, DFPRegs:$rs1, DFPRegs:$rs2)>;
 def : InstAlias<"fcmpq $rs1, $rs2", (V9FCMPQ FCC0, QFPRegs:$rs1, QFPRegs:$rs2)>,
                 Requires<[HasHardQuad]>;
+
+def : InstAlias<"fcmpes $rs1, $rs2", (V9FCMPES FCC0, FPRegs:$rs1, FPRegs:$rs2)>;
+def : InstAlias<"fcmped $rs1, $rs2", (V9FCMPED FCC0, DFPRegs:$rs1,
+                                                     DFPRegs:$rs2)>;
+def : InstAlias<"fcmpeq $rs1, $rs2", (V9FCMPEQ FCC0, QFPRegs:$rs1,
+                                                     QFPRegs:$rs2)>,
+                Requires<[HasHardQuad]>;

diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index ceda1504ccd1140ae121b155aef4d952ad6b32b2..e8934deeba808f2a507513a1f5d7baa278eb89bc 100644 (file)
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -1040,6 +1040,19 @@ def V9FCMPQ  : F3_3c<2, 0b110101, 0b001010011,
                 "fcmpq $rd, $rs1, $rs2", []>,
                  Requires<[HasHardQuad]>;
 
+let hasSideEffects = 1 in {
+  def V9FCMPES  : F3_3c<2, 0b110101, 0b001010101,
+                   (outs FCCRegs:$rd), (ins FPRegs:$rs1, FPRegs:$rs2),
+                   "fcmpes $rd, $rs1, $rs2", []>;
+  def V9FCMPED  : F3_3c<2, 0b110101, 0b001010110,
+                   (outs FCCRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+                   "fcmped $rd, $rs1, $rs2", []>;
+  def V9FCMPEQ  : F3_3c<2, 0b110101, 0b001010111,
+                   (outs FCCRegs:$rd), (ins QFPRegs:$rs1, QFPRegs:$rs2),
+                   "fcmpeq $rd, $rs1, $rs2", []>,
+                   Requires<[HasHardQuad]>;
+}
+
 // Floating point conditional move instrucitons with %fcc0-%fcc3.
 let Predicates = [HasV9] in {
   let Constraints = "$f = $rd", intcc = 0 in {

diff --git a/test/MC/Sparc/sparc-fp-instructions.s b/test/MC/Sparc/sparc-fp-instructions.s
index 88a055d7fcc04fd31bb47cedf7647fca13ae66c1..fdeaa8c088dc1c9cd9342a06288be2160bacf6ae 100644 (file)
--- a/test/MC/Sparc/sparc-fp-instructions.s
+++ b/test/MC/Sparc/sparc-fp-instructions.s
@@ -103,6 +103,13 @@
         fcmpd %f0, %f4
         fcmpq %f0, %f4
 
+        ! CHECK: fcmpes %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0xa4]
+        ! CHECK: fcmped %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0xc4]
+        ! CHECK: fcmpeq %fcc0, %f0, %f4                  ! encoding: [0x81,0xa8,0x0a,0xe4]
+        fcmpes %f0, %f4
+        fcmped %f0, %f4
+        fcmpeq %f0, %f4
+
         ! CHECK: fcmps %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0x24]
         ! CHECK: fcmpd %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0x44]
         ! CHECK: fcmpq %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0x64]
@@ -110,6 +117,13 @@
         fcmpd %fcc2, %f0, %f4
         fcmpq %fcc2, %f0, %f4
 
+        ! CHECK: fcmpes %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0xa4]
+        ! CHECK: fcmped %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0xc4]
+        ! CHECK: fcmpeq %fcc2, %f0, %f4                  ! encoding: [0x85,0xa8,0x0a,0xe4]
+        fcmpes %fcc2, %f0, %f4
+        fcmped %fcc2, %f0, %f4
+        fcmpeq %fcc2, %f0, %f4
+
         ! CHECK: fxtos %f0, %f4                  ! encoding: [0x89,0xa0,0x10,0x80]
         ! CHECK: fxtod %f0, %f4                  ! encoding: [0x89,0xa0,0x11,0x00]
         ! CHECK: fxtoq %f0, %f4                  ! encoding: [0x89,0xa0,0x11,0x80]

diff --git a/test/MC/Sparc/sparcv8-instructions.s b/test/MC/Sparc/sparcv8-instructions.s
index 27b32976f37b72d8d8d6938a062ab965555dc249..9071b45740c9fc44460667891ef786681d24e528 100644 (file)
--- a/test/MC/Sparc/sparcv8-instructions.s
+++ b/test/MC/Sparc/sparcv8-instructions.s
@@ -6,3 +6,10 @@
         fcmps %f0, %f4
         fcmpd %f0, %f4
         fcmpq %f0, %f4
+
+        ! CHECK: fcmpes %f0, %f4          ! encoding: [0x81,0xa8,0x0a,0xa4]
+        ! CHECK: fcmped %f0, %f4          ! encoding: [0x81,0xa8,0x0a,0xc4]
+        ! CHECK: fcmpeq %f0, %f4          ! encoding: [0x81,0xa8,0x0a,0xe4]
+        fcmpes %f0, %f4
+        fcmped %f0, %f4
+        fcmpeq %f0, %f4