video: da8xx-fb: fixing timing off by one errors

The LCD controller represents some of the timing fields with a 0
in the register representing 1.  This was not taken into account
when these registers were being set.  Interestingly enough not
all of the LCDC controller timing registers implement this representation
so carefully went through the technical reference manual to only "fix"
the correct timings.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0a0983f880751aaa0e922214cf10142b217617a6..7dfa7a70fcfe211d24f7817eff4c85b2c46c58b6 100644 (file)
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -407,9 +407,9 @@ static void lcd_cfg_horizontal_sync(int back_porch, int pulse_width,
        u32 reg;
 
        reg = lcdc_read(LCD_RASTER_TIMING_0_REG) & 0xf;
-       reg |= ((back_porch & 0xff) << 24)
-           | ((front_porch & 0xff) << 16)
-           | ((pulse_width & 0x3f) << 10);
+       reg |= (((back_porch-1) & 0xff) << 24)
+           | (((front_porch-1) & 0xff) << 16)
+           | (((pulse_width-1) & 0x3f) << 10);
        lcdc_write(reg, LCD_RASTER_TIMING_0_REG);
 }
 
@@ -421,7 +421,7 @@ static void lcd_cfg_vertical_sync(int back_porch, int pulse_width,
        reg = lcdc_read(LCD_RASTER_TIMING_1_REG) & 0x3ff;
        reg |= ((back_porch & 0xff) << 24)
            | ((front_porch & 0xff) << 16)
-           | ((pulse_width & 0x3f) << 10);
+           | (((pulse_width-1) & 0x3f) << 10);
        lcdc_write(reg, LCD_RASTER_TIMING_1_REG);
 }