#include <plat/dma-pl330.h>
#include <mach/gpio.h>
#include <mach/iomux.h>
+#include <mach/debug_uart.h>
#include <plat/rk_fiq_debugger.h>
#ifdef CONFIG_ADC_RK30
--- /dev/null
+#ifndef __MACH_DEBUG_UART
+#define __MACH_DEBUG_UART
+
+#if CONFIG_RK_DEBUG_UART >= 0 && CONFIG_RK_DEBUG_UART < 4
+
+#if CONFIG_RK_DEBUG_UART == 0
+#define DEBUG_UART_PHYS RK30_UART0_PHYS
+#define DEBUG_UART_BASE RK30_UART0_BASE
+#elif CONFIG_RK_DEBUG_UART == 1
+#define DEBUG_UART_PHYS RK30_UART1_PHYS
+#define DEBUG_UART_BASE RK30_UART1_BASE
+#elif CONFIG_RK_DEBUG_UART == 2
+#define DEBUG_UART_PHYS RK30_UART2_PHYS
+#define DEBUG_UART_BASE RK30_UART2_BASE
+#elif CONFIG_RK_DEBUG_UART == 3
+#define DEBUG_UART_PHYS RK30_UART3_PHYS
+#define DEBUG_UART_BASE RK30_UART3_BASE
+#endif
+
+#define IRQ_DEBUG_UART (IRQ_UART0 + CONFIG_RK_DEBUG_UART)
+
+#endif
+
+#endif
#define RK30_HSIC_PHYS 0x10240000
#define RK30_HSIC_SIZE SZ_256K
-#if CONFIG_RK_DEBUG_UART == 0
-#define DEBUG_UART_PHYS RK30_UART0_PHYS
-#define DEBUG_UART_BASE RK30_UART0_BASE
-#elif CONFIG_RK_DEBUG_UART == 1
-#define DEBUG_UART_PHYS RK30_UART1_PHYS
-#define DEBUG_UART_BASE RK30_UART1_BASE
-#elif CONFIG_RK_DEBUG_UART == 2
-#define DEBUG_UART_PHYS RK30_UART2_PHYS
-#define DEBUG_UART_BASE RK30_UART2_BASE
-#elif CONFIG_RK_DEBUG_UART == 3
-#define DEBUG_UART_PHYS RK30_UART3_PHYS
-#define DEBUG_UART_BASE RK30_UART3_BASE
-#endif
-
#define GIC_DIST_BASE RK30_GICD_BASE
#define GIC_CPU_BASE RK30_GICC_BASE
//hhb@rock-chips.com this spi is used for fiq_debugger signal irq
#define IRQ_UART_SIGNAL RK30XX_IRQ(80)
-#if CONFIG_RK_DEBUG_UART >= 0 && CONFIG_RK_DEBUG_UART < 4
-#define IRQ_DEBUG_UART (IRQ_UART0 + CONFIG_RK_DEBUG_UART)
-#endif
#define IRQ_ARM_PMU RK30XX_IRQ(103)
#include <mach/iomux.h>
#include <mach/cru.h>
#include <mach/ddr.h>
+#include <mach/debug_uart.h>
#define cru_readl(offset) readl_relaxed(RK30_CRU_BASE + offset)
#define cru_writel(v, offset) do { writel_relaxed(v, RK30_CRU_BASE + offset); dsb(); } while (0)