rk2928:sdk: setup arm clk 1GHz

diff --git a/arch/arm/mach-rk2928/clock_data.c b/arch/arm/mach-rk2928/clock_data.c
index 651c3ef27135b886ca17d6685a7116fd6a66158c..229272289feb56560980e094f553309502157990 100644 (file)
--- a/arch/arm/mach-rk2928/clock_data.c
+++ b/arch/arm/mach-rk2928/clock_data.c
@@ -2409,7 +2409,7 @@ static void __init rk2928_clock_common_init(unsigned long gpll_rate,unsigned lon
 {
        CLKDATA_DBG("ENTER %s\n", __func__);
 
-       clk_set_rate_nolock(&clk_core_pre, 650 * MHZ);//816
+       clk_set_rate_nolock(&clk_core_pre, 1000 * MHZ);//816
        //general
        clk_set_rate_nolock(&general_pll_clk, gpll_rate);
        //code pll