add a beta option for turning on dag->dag isel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22837 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index e1f29ba519197f7acb1b470b80ae3d78bad554b5..18c7fdc9048fa3bc6a8131b775e58c2f6615222c 100644 (file)
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -30,8 +30,11 @@
 using namespace llvm;
 
 namespace {
-  const std::string PPC32ID = "PowerPC/32bit";
+  const char *PPC32ID = "PowerPC/32bit";
 
+  static cl::opt<bool> EnablePPCDAGDAG("enable-ppc-dag-isel", cl::Hidden,
+                            cl::desc("Enable DAG-to-DAG isel for PPC (beta)"));
+  
   // Register the targets
   RegisterTarget<PPC32TargetMachine>
   X("ppc32", "  PowerPC 32-bit");
@@ -81,8 +84,11 @@ bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
 
-  // Default to pattern ISel
-  if (PatternISelTriState == 0) {
+  // Install an instruction selector.
+  if (EnablePPCDAGDAG) {
+    PM.add(createPPC32ISelDag(*this));
+    
+  } else if (PatternISelTriState == 0) {
     PM.add(createLowerConstantExpressionsPass());
     PM.add(createPPC32ISelSimple(*this));
   } else