{
.name = "spi0 cs0",
.cs_gpio = RK29_PIN2_PC1,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C1_SPI0CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI0_CSN0,
},
{
.name = "spi0 cs1",
{
.name = "spi1 cs0",
.cs_gpio = RK29_PIN2_PC5,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C5_SPI1CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI1_CSN0,
},
{
.name = "spi1 cs1",
static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
{
#if 1
- int i,j,ret;
-
- //cs
+ int i;
if (cs_gpios) {
for (i=0; i<cs_num; i++) {
rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
- ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);
- if (ret) {
- for (j=0;j<i;j++) {
- gpio_free(cs_gpios[j].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);
- }
- printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);
- return -1;
- }
- gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);
}
}
#endif
static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
{
-#if 1
- int i;
-
- if (cs_gpios) {
- for (i=0; i<cs_num; i++) {
- gpio_free(cs_gpios[i].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);
- }
- }
-#endif
return 0;
}
* author: cmc@rock-chips.com\r
*****************************************************************************************/\r
#define SPI_CHIPSELECT_NUM 2\r
-struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
+static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
{\r
.name = "spi0 cs0",\r
.cs_gpio = RK29_PIN2_PC1,\r
- .cs_iomux_name = NULL,\r
+ .cs_iomux_name = GPIO2C1_SPI0CSN0_NAME,\r
+ .cs_iomux_mode = GPIO2H_SPI0_CSN0,\r
},\r
{\r
.name = "spi0 cs1",\r
}\r
};\r
\r
-struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
+static struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
{\r
.name = "spi1 cs0",\r
.cs_gpio = RK29_PIN2_PC5,\r
- .cs_iomux_name = NULL,\r
+ .cs_iomux_name = GPIO2C5_SPI1CSN0_NAME,\r
+ .cs_iomux_mode = GPIO2H_SPI1_CSN0,\r
},\r
{\r
.name = "spi1 cs1",\r
static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)\r
{\r
#if 1\r
- int i,j,ret;\r
-\r
- //cs\r
+ int i;\r
if (cs_gpios) {\r
for (i=0; i<cs_num; i++) {\r
rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);\r
- ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);\r
- if (ret) {\r
- for (j=0;j<i;j++) {\r
- gpio_free(cs_gpios[j].cs_gpio);\r
- //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);\r
- }\r
- printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);\r
- return -1;\r
- }\r
- gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);\r
}\r
}\r
#endif\r
\r
static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)\r
{\r
-#if 1\r
- int i;\r
-\r
- if (cs_gpios) {\r
- for (i=0; i<cs_num; i++) {\r
- gpio_free(cs_gpios[i].cs_gpio);\r
- //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);\r
- }\r
- }\r
-#endif\r
return 0;\r
}\r
\r
{
.name = "spi0 cs0",
.cs_gpio = RK29_PIN2_PC1,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C1_SPI0CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI0_CSN0,
},
{
.name = "spi0 cs1",
{
.name = "spi1 cs0",
.cs_gpio = RK29_PIN2_PC5,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C5_SPI1CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI1_CSN0,
},
{
.name = "spi1 cs1",
static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
{
#if 1
- int i,j,ret;
-
- //cs
- if (cs_gpios) {
- for (i=0; i<cs_num; i++) {
- rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
- ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);
- if (ret) {
- for (j=0;j<i;j++) {
- gpio_free(cs_gpios[j].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);
- }
- printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);
- return -1;
+ int i;
+ if (cs_gpios) {
+ for (i=0; i<cs_num; i++) {
+ rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
}
- gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);
}
- }
#endif
return 0;
}
static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
{
-#if 1
- int i;
-
- if (cs_gpios) {
- for (i=0; i<cs_num; i++) {
- gpio_free(cs_gpios[i].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);
- }
- }
-#endif
return 0;
}
* author: cmc@rock-chips.com
*****************************************************************************************/
#define SPI_CHIPSELECT_NUM 2
-struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
+static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
{
.name = "spi0 cs0",
.cs_gpio = RK29_PIN2_PC1,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C1_SPI0CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI0_CSN0,
},
{
.name = "spi0 cs1",
}
};
-struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
+static struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
{
.name = "spi1 cs0",
.cs_gpio = RK29_PIN2_PC5,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C5_SPI1CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI1_CSN0,
},
{
.name = "spi1 cs1",
static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
{
#if 1
- int i,j,ret;
-
- //cs
+ int i;
if (cs_gpios) {
for (i=0; i<cs_num; i++) {
rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
- ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);
- if (ret) {
- for (j=0;j<i;j++) {
- gpio_free(cs_gpios[j].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);
- }
- printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);
- return -1;
- }
- gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);
}
}
#endif
static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
{
-#if 1
- int i;
-
- if (cs_gpios) {
- for (i=0; i<cs_num; i++) {
- gpio_free(cs_gpios[i].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);
- }
- }
-#endif
return 0;
}
{
.name = "spi0 cs0",
.cs_gpio = RK29_PIN2_PC1,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C1_SPI0CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI0_CSN0,
},
{
.name = "spi0 cs1",
{
.name = "spi1 cs0",
.cs_gpio = RK29_PIN2_PC5,
- .cs_iomux_name = NULL,
+ .cs_iomux_name = GPIO2C5_SPI1CSN0_NAME,
+ .cs_iomux_mode = GPIO2H_SPI1_CSN0,
},
{
.name = "spi1 cs1",
static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
{
#if 1
- int i,j,ret;
-
- //cs
+ int i;
if (cs_gpios) {
for (i=0; i<cs_num; i++) {
rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
- ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);
- if (ret) {
- for (j=0;j<i;j++) {
- gpio_free(cs_gpios[j].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);
- }
- printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);
- return -1;
- }
- gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);
}
}
#endif
static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
{
-#if 1
- int i;
-
- if (cs_gpios) {
- for (i=0; i<cs_num; i++) {
- gpio_free(cs_gpios[i].cs_gpio);
- //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);
- }
- }
-#endif
return 0;
}
#define TXBUSY (1<<3)\r
\r
static void spi_dump_regs(struct rk29xx_spi *dws) {\r
- printk("MRST SPI0 registers:\n");\r
- printk("=================================\n");\r
- printk("CTRL0: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_CTRLR0));\r
- printk("CTRL1: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_CTRLR1));\r
- printk("SSIENR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_ENR));\r
- printk("SER: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_SER));\r
- printk("BAUDR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_BAUDR));\r
- printk("TXFTLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_TXFTLR));\r
- printk("RXFTLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_RXFTLR));\r
- printk("TXFLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_TXFLR));\r
- printk("RXFLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_RXFLR));\r
- printk("SR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_SR));\r
- printk("IMR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_IMR));\r
- printk("ISR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_ISR));\r
- printk("DMACR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_DMACR));\r
- printk("DMATDLR: \t0x%08x\n", rk29xx_readl(dws, SPIM_DMATDLR));\r
- printk("DMARDLR: \t0x%08x\n", rk29xx_readl(dws, SPIM_DMARDLR));\r
- printk("=================================\n");\r
+ DBG("MRST SPI0 registers:\n");\r
+ DBG("=================================\n");\r
+ DBG("CTRL0: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_CTRLR0));\r
+ DBG("CTRL1: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_CTRLR1));\r
+ DBG("SSIENR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_ENR));\r
+ DBG("SER: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_SER));\r
+ DBG("BAUDR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_BAUDR));\r
+ DBG("TXFTLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_TXFTLR));\r
+ DBG("RXFTLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_RXFTLR));\r
+ DBG("TXFLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_TXFLR));\r
+ DBG("RXFLR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_RXFLR));\r
+ DBG("SR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_SR));\r
+ DBG("IMR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_IMR));\r
+ DBG("ISR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_ISR));\r
+ DBG("DMACR: \t\t0x%08x\n", rk29xx_readl(dws, SPIM_DMACR));\r
+ DBG("DMATDLR: \t0x%08x\n", rk29xx_readl(dws, SPIM_DMATDLR));\r
+ DBG("DMARDLR: \t0x%08x\n", rk29xx_readl(dws, SPIM_DMARDLR));\r
+ DBG("=================================\n");\r
\r
}\r
\r
static void spi_cs_control(struct rk29xx_spi *dws, u32 cs, u8 flag)\r
{\r
#if 1\r
- return;\r
+ if (flag)\r
+ rk29xx_writel(dws, SPIM_SER, 1 << cs);\r
+ else \r
+ rk29xx_writel(dws, SPIM_SER, 0);\r
+ return;\r
#else\r
struct rk29xx_spi_platform_data *pdata = dws->master->dev.platform_data;\r
struct spi_cs_gpio *cs_gpios = pdata->chipselect_gpios;\r
\r
- if (flag == 0)\r
+ if (flag == 0) {\r
gpio_direction_output(cs_gpios[cs].cs_gpio, GPIO_HIGH);\r
- else\r
+ }\r
+ else {\r
gpio_direction_output(cs_gpios[cs].cs_gpio, GPIO_LOW);\r
+ }\r
#endif\r
}\r
\r
DBG("dws->tx_dmach: %d, dws->rx_dmach: %d, transfer->tx_dma: 0x%x\n", dws->tx_dmach, dws->rx_dmach, (unsigned int)transfer->tx_dma);\r
if (transfer->tx_buf != NULL) {\r
dws->state |= TXBUSY;\r
- if (transfer->len & 0x3) {\r
+ /*if (transfer->len & 0x3) {\r
burst = 1;\r
}\r
else {\r
burst = 4;\r
}\r
- if (rk29_dma_config(dws->tx_dmach, burst)) {\r
+ if (rk29_dma_config(dws->tx_dmach, burst)) {*/\r
+ if (rk29_dma_config(dws->tx_dmach, 1)) {//there is not dma burst but bitwide, set it 1 alwayss\r
dev_err(&dws->master->dev, "function: %s, line: %d\n", __FUNCTION__, __LINE__);\r
goto err_out;\r
}\r
\r
+ rk29_dma_ctrl(dws->tx_dmach, RK29_DMAOP_FLUSH); \r
+ \r
iRet = rk29_dma_enqueue(dws->tx_dmach, (void *)dws,\r
transfer->tx_dma, transfer->len);\r
if (iRet) {\r
}\r
}\r
\r
+ wait_till_not_busy(dws);\r
+\r
if (transfer->rx_buf != NULL) {\r
dws->state |= RXBUSY;\r
if (rk29_dma_config(dws->rx_dmach, 1)) {\r
dev_err(&dws->master->dev, "function: %s, line: %d\n", __FUNCTION__, __LINE__);\r
goto err_out;\r
}\r
+\r
+ rk29_dma_ctrl(dws->rx_dmach, RK29_DMAOP_FLUSH); \r
\r
iRet = rk29_dma_enqueue(dws->rx_dmach, (void *)dws,\r
transfer->rx_dma, transfer->len);\r
} else
local_buf = buf;
+ memset(local_buf, 0, SPI_BUFSIZ);
memcpy(local_buf, txbuf, n_tx);
x[0].tx_buf = local_buf;
x[1].rx_buf = local_buf + n_tx;