Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).

Some assemblers can't recognize the aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25494 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index 9c546a71d87fa74f94da11313deca9ab922d1941..8c53b8234795a8d47ea68201d17e72b4b1d8f3a1 100644 (file)
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -324,11 +324,11 @@ static const TableEntry OpcodeTable[] = {
   { X86::FpADD32m  , X86::FADD32m  },
   { X86::FpADD64m  , X86::FADD64m  },
   { X86::FpCHS     , X86::FCHS     },
-  { X86::FpCMOVA   , X86::FCMOVA   },
-  { X86::FpCMOVAE  , X86::FCMOVAE  },
   { X86::FpCMOVB   , X86::FCMOVB   },
   { X86::FpCMOVBE  , X86::FCMOVBE  },
   { X86::FpCMOVE   , X86::FCMOVE   },
+  { X86::FpCMOVNB  , X86::FCMOVNB  },
+  { X86::FpCMOVNBE , X86::FCMOVNBE },
   { X86::FpCMOVNE  , X86::FCMOVNE  },
   { X86::FpCMOVNP  , X86::FCMOVNP  },
   { X86::FpCMOVP   , X86::FCMOVP   },

diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp
index 1ec33722039d6079ed89303927b4708d36667ca0..b895be2591bac543c76d6cbb5b695a965c873fcf 100644 (file)
--- a/lib/Target/X86/X86ISelPattern.cpp
+++ b/lib/Target/X86/X86ISelPattern.cpp
@@ -758,7 +758,7 @@ void ISel::EmitSelectCC(SDOperand Cond, SDOperand True, SDOperand False,
   static const unsigned CMOVTABFP[] = {
     X86::FpCMOVE,  X86::FpCMOVNE, /*missing*/0, /*missing*/0,
     /*missing*/0,  /*missing*/ 0, X86::FpCMOVB, X86::FpCMOVBE,
-    X86::FpCMOVA,  X86::FpCMOVAE, X86::FpCMOVP, X86::FpCMOVNP
+    X86::FpCMOVNBE,X86::FpCMOVNB, X86::FpCMOVP, X86::FpCMOVNP
   };
   static const int SSE_CMOVTAB[] = {
     /*CMPEQ*/   0, /*CMPNEQ*/   4, /*missing*/  0, /*missing*/  0,

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index b60292e71cd47225da902209e80882f79ee76dcb..04f8f16e15de90bd879c47f5bfaa7cb525e7a2b7 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2862,10 +2862,10 @@ let isTwoAddress = 1 in {
   def FpCMOVP  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
                      [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
                                       X86_COND_P, STATUS))]>;
-  def FpCMOVAE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+  def FpCMOVNB : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
                      [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
                                       X86_COND_AE, STATUS))]>;
-  def FpCMOVA  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+  def FpCMOVNBE: FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
                      [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
                                       X86_COND_A, STATUS))]>;
   def FpCMOVNE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
@@ -2884,10 +2884,10 @@ def FCMOVE  : FPI<0xC8, AddRegFrm, (ops RST:$op),
                   "fcmove {$op, %ST(0)|%ST(0), $op}">, DA;
 def FCMOVP  : FPI<0xD8, AddRegFrm, (ops RST:$op),
                   "fcmovu  {$op, %ST(0)|%ST(0), $op}">, DA;
-def FCMOVAE : FPI<0xC0, AddRegFrm, (ops RST:$op),
-                  "fcmovae {$op, %ST(0)|%ST(0), $op}">, DB;
-def FCMOVA  : FPI<0xD0, AddRegFrm, (ops RST:$op),
-                  "fcmova {$op, %ST(0)|%ST(0), $op}">, DB;
+def FCMOVNB : FPI<0xC0, AddRegFrm, (ops RST:$op),
+                  "fcmovnb {$op, %ST(0)|%ST(0), $op}">, DB;
+def FCMOVNBE  : FPI<0xD0, AddRegFrm, (ops RST:$op),
+                  "fcmovnbe {$op, %ST(0)|%ST(0), $op}">, DB;
 def FCMOVNE : FPI<0xC8, AddRegFrm, (ops RST:$op),
                   "fcmovne {$op, %ST(0)|%ST(0), $op}">, DB;
 def FCMOVNP : FPI<0xD8, AddRegFrm, (ops RST:$op),