Fix ARM encoding of LDM+Return instruction.
authorJim Grosbach <grosbach@apple.com>
Wed, 10 Nov 2010 23:12:48 +0000 (23:12 +0000)
committerJim Grosbach <grosbach@apple.com>
Wed, 10 Nov 2010 23:12:48 +0000 (23:12 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118730 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMInstrFormats.td
lib/Target/ARM/ARMInstrInfo.td

index 7add36b1acc5511fcce1899b6d422b4e27aef50c..ddf0c82e5568139b3799d2de8831253a27570c93 100644 (file)
@@ -941,9 +941,11 @@ class AXI4ld<dag oops, dag iops, IndexMode im, Format f, InstrItinClass itin,
   : XI<oops, iops, AddrMode4, Size4Bytes, im, f, itin,
        asm, cstr, pattern> {
   bits<16> dsts;
-  let Inst{20}    = 1; // L bit
-  let Inst{22}    = 0; // S bit
+  bits<4> Rn;
   let Inst{27-25} = 0b100;
+  let Inst{22}    = 0; // S bit
+  let Inst{20}    = 1; // L bit
+  let Inst{19-16} = Rn;
   let Inst{15-0}  = dsts;
 }
 class AXI4st<dag oops, dag iops, IndexMode im, Format f, InstrItinClass itin,
index 64a3dc73ceef88709b911e5b045828e19782f9fa..9865ee5e543b229387415d149256894f2e25a96a 100644 (file)
@@ -1183,7 +1183,12 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
                                         reglist:$dsts, variable_ops),
                        IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr,
                        "ldm${mode}${p}\t$Rn!, $dsts",
-                       "$Rn = $wb", []>;
+                       "$Rn = $wb", []> {
+  bits<4> p;
+  let Inst{31-28} = p;
+  let Inst{24-23} = 0b01;
+  let Inst{21}    = 1;
+}
 
 // On non-Darwin platforms R9 is callee-saved.
 let isCall = 1,