PK_R,
PK_M
};
-} // namespace ARM
-
-// Target Parsers, one per architecture.
-class ARMTargetParser {
- static StringRef getHWDivSynonym(StringRef HWDiv);
- static StringRef getFPUSynonym(StringRef FPU);
- static StringRef getArchSynonym(StringRef Arch);
-public:
- static StringRef getCanonicalArchName(StringRef Arch);
+ StringRef getCanonicalArchName(StringRef Arch);
// Information by ID
- static const char * getFPUName(unsigned FPUKind);
- static unsigned getFPUVersion(unsigned FPUKind);
- static unsigned getFPUNeonSupportLevel(unsigned FPUKind);
- static unsigned getFPURestriction(unsigned FPUKind);
- static unsigned getDefaultFPU(StringRef CPU);
+ const char * getFPUName(unsigned FPUKind);
+ unsigned getFPUVersion(unsigned FPUKind);
+ unsigned getFPUNeonSupportLevel(unsigned FPUKind);
+ unsigned getFPURestriction(unsigned FPUKind);
+ unsigned getDefaultFPU(StringRef CPU);
// FIXME: This should be moved to TargetTuple once it exists
- static bool getFPUFeatures(unsigned FPUKind,
- std::vector<const char*> &Features);
- static bool getHWDivFeatures(unsigned HWDivKind,
- std::vector<const char*> &Features);
- static const char * getArchName(unsigned ArchKind);
- static unsigned getArchAttr(unsigned ArchKind);
- static const char * getCPUAttr(unsigned ArchKind);
- static const char * getSubArch(unsigned ArchKind);
- static const char * getArchExtName(unsigned ArchExtKind);
- static const char * getHWDivName(unsigned HWDivKind);
- static const char * getDefaultCPU(StringRef Arch);
+ bool getFPUFeatures(unsigned FPUKind, std::vector<const char *> &Features);
+ bool getHWDivFeatures(unsigned HWDivKind,
+ std::vector<const char *> &Features);
+ const char *getArchName(unsigned ArchKind);
+ unsigned getArchAttr(unsigned ArchKind);
+ const char *getCPUAttr(unsigned ArchKind);
+ const char *getSubArch(unsigned ArchKind);
+ const char *getArchExtName(unsigned ArchExtKind);
+ const char *getHWDivName(unsigned HWDivKind);
+ const char *getDefaultCPU(StringRef Arch);
// Parser
- static unsigned parseHWDiv(StringRef HWDiv);
- static unsigned parseFPU(StringRef FPU);
- static unsigned parseArch(StringRef Arch);
- static unsigned parseArchExt(StringRef ArchExt);
- static unsigned parseCPUArch(StringRef CPU);
- static unsigned parseArchISA(StringRef Arch);
- static unsigned parseArchEndian(StringRef Arch);
- static unsigned parseArchProfile(StringRef Arch);
- static unsigned parseArchVersion(StringRef Arch);
-
-};
+ unsigned parseHWDiv(StringRef HWDiv);
+ unsigned parseFPU(StringRef FPU);
+ unsigned parseArch(StringRef Arch);
+ unsigned parseArchExt(StringRef ArchExt);
+ unsigned parseCPUArch(StringRef CPU);
+ unsigned parseArchISA(StringRef Arch);
+ unsigned parseArchEndian(StringRef Arch);
+ unsigned parseArchProfile(StringRef Arch);
+ unsigned parseArchVersion(StringRef Arch);
+} // namespace ARM
} // namespace llvm
#endif
// Information by ID
// ======================================================= //
-const char *ARMTargetParser::getFPUName(unsigned FPUKind) {
+const char *llvm::ARM::getFPUName(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
return nullptr;
return FPUNames[FPUKind].Name;
}
-unsigned ARMTargetParser::getFPUVersion(unsigned FPUKind) {
+unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
return 0;
return FPUNames[FPUKind].FPUVersion;
}
-unsigned ARMTargetParser::getFPUNeonSupportLevel(unsigned FPUKind) {
+unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
return 0;
return FPUNames[FPUKind].NeonSupport;
}
-unsigned ARMTargetParser::getFPURestriction(unsigned FPUKind) {
+unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
return 0;
return FPUNames[FPUKind].Restriction;
}
-unsigned ARMTargetParser::getDefaultFPU(StringRef CPU) {
+unsigned llvm::ARM::getDefaultFPU(StringRef CPU) {
for (const auto C : CPUNames) {
if (CPU == C.Name)
return C.DefaultFPU;
return ARM::FK_INVALID;
}
-bool ARMTargetParser::getHWDivFeatures(unsigned HWDivKind,
+bool llvm::ARM::getHWDivFeatures(unsigned HWDivKind,
std::vector<const char *> &Features) {
if (HWDivKind == ARM::AEK_INVALID)
return true;
}
-bool ARMTargetParser::getFPUFeatures(unsigned FPUKind,
+bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
std::vector<const char *> &Features) {
if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID)
return true;
}
-const char *ARMTargetParser::getArchName(unsigned ArchKind) {
+const char *llvm::ARM::getArchName(unsigned ArchKind) {
if (ArchKind >= ARM::AK_LAST)
return nullptr;
return ARCHNames[ArchKind].Name;
}
-const char *ARMTargetParser::getCPUAttr(unsigned ArchKind) {
+const char *llvm::ARM::getCPUAttr(unsigned ArchKind) {
if (ArchKind >= ARM::AK_LAST)
return nullptr;
return ARCHNames[ArchKind].CPUAttr;
}
-const char *ARMTargetParser::getSubArch(unsigned ArchKind) {
+const char *llvm::ARM::getSubArch(unsigned ArchKind) {
if (ArchKind >= ARM::AK_LAST)
return nullptr;
return ARCHNames[ArchKind].SubArch;
}
-unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) {
+unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
if (ArchKind >= ARM::AK_LAST)
return ARMBuildAttrs::CPUArch::Pre_v4;
return ARCHNames[ArchKind].ArchAttr;
}
-const char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) {
+const char *llvm::ARM::getArchExtName(unsigned ArchExtKind) {
for (const auto AE : ARCHExtNames) {
if (ArchExtKind == AE.ID)
return AE.Name;
return nullptr;
}
-const char *ARMTargetParser::getHWDivName(unsigned HWDivKind) {
+const char *llvm::ARM::getHWDivName(unsigned HWDivKind) {
for (const auto D : HWDivNames) {
if (HWDivKind == D.ID)
return D.Name;
return nullptr;
}
-const char *ARMTargetParser::getDefaultCPU(StringRef Arch) {
+const char *llvm::ARM::getDefaultCPU(StringRef Arch) {
unsigned AK = parseArch(Arch);
if (AK == ARM::AK_INVALID)
return nullptr;
// Parsers
// ======================================================= //
-StringRef ARMTargetParser::getHWDivSynonym(StringRef HWDiv) {
+static StringRef getHWDivSynonym(StringRef HWDiv) {
return StringSwitch<StringRef>(HWDiv)
.Case("thumb,arm", "arm,thumb")
.Default(HWDiv);
}
-StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) {
+static StringRef getFPUSynonym(StringRef FPU) {
return StringSwitch<StringRef>(FPU)
.Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
.Case("vfp2", "vfpv2")
.Default(FPU);
}
-StringRef ARMTargetParser::getArchSynonym(StringRef Arch) {
+static StringRef getArchSynonym(StringRef Arch) {
return StringSwitch<StringRef>(Arch)
.Case("v6sm", "v6s-m")
.Case("v6m", "v6-m")
// (iwmmxt|xscale)(eb)? is also permitted. If the former, return
// "v.+", if the latter, return unmodified string, minus 'eb'.
// If invalid, return empty string.
-StringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) {
+StringRef llvm::ARM::getCanonicalArchName(StringRef Arch) {
size_t offset = StringRef::npos;
StringRef A = Arch;
StringRef Error = "";
return A;
}
-unsigned ARMTargetParser::parseHWDiv(StringRef HWDiv) {
+unsigned llvm::ARM::parseHWDiv(StringRef HWDiv) {
StringRef Syn = getHWDivSynonym(HWDiv);
for (const auto D : HWDivNames) {
if (Syn == D.Name)
return ARM::AEK_INVALID;
}
-unsigned ARMTargetParser::parseFPU(StringRef FPU) {
+unsigned llvm::ARM::parseFPU(StringRef FPU) {
StringRef Syn = getFPUSynonym(FPU);
for (const auto F : FPUNames) {
if (Syn == F.Name)
}
// Allows partial match, ex. "v7a" matches "armv7a".
-unsigned ARMTargetParser::parseArch(StringRef Arch) {
+unsigned llvm::ARM::parseArch(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
StringRef Syn = getArchSynonym(Arch);
for (const auto A : ARCHNames) {
return ARM::AK_INVALID;
}
-unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) {
+unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
for (const auto A : ARCHExtNames) {
if (ArchExt == A.Name)
return A.ID;
return ARM::AEK_INVALID;
}
-unsigned ARMTargetParser::parseCPUArch(StringRef CPU) {
+unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
for (const auto C : CPUNames) {
if (CPU == C.Name)
return C.ArchID;
}
// ARM, Thumb, AArch64
-unsigned ARMTargetParser::parseArchISA(StringRef Arch) {
+unsigned llvm::ARM::parseArchISA(StringRef Arch) {
return StringSwitch<unsigned>(Arch)
.StartsWith("aarch64", ARM::IK_AARCH64)
.StartsWith("arm64", ARM::IK_AARCH64)
}
// Little/Big endian
-unsigned ARMTargetParser::parseArchEndian(StringRef Arch) {
+unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
if (Arch.startswith("armeb") ||
Arch.startswith("thumbeb") ||
Arch.startswith("aarch64_be"))
}
// Profile A/R/M
-unsigned ARMTargetParser::parseArchProfile(StringRef Arch) {
+unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
switch(parseArch(Arch)) {
case ARM::AK_ARMV6M:
}
// Version number (ex. v7 = 7).
-unsigned ARMTargetParser::parseArchVersion(StringRef Arch) {
+unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
switch(parseArch(Arch)) {
case ARM::AK_ARMV2:
}
static Triple::ArchType parseARMArch(StringRef ArchName) {
- unsigned ISA = ARMTargetParser::parseArchISA(ArchName);
- unsigned ENDIAN = ARMTargetParser::parseArchEndian(ArchName);
+ unsigned ISA = ARM::parseArchISA(ArchName);
+ unsigned ENDIAN = ARM::parseArchEndian(ArchName);
Triple::ArchType arch = Triple::UnknownArch;
switch (ENDIAN) {
}
}
- ArchName = ARMTargetParser::getCanonicalArchName(ArchName);
+ ArchName = ARM::getCanonicalArchName(ArchName);
if (ArchName.empty())
return Triple::UnknownArch;
return Triple::UnknownArch;
// Thumb only for v6m
- unsigned Profile = ARMTargetParser::parseArchProfile(ArchName);
- unsigned Version = ARMTargetParser::parseArchVersion(ArchName);
+ unsigned Profile = ARM::parseArchProfile(ArchName);
+ unsigned Version = ARM::parseArchVersion(ArchName);
if (Profile == ARM::PK_M && Version == 6) {
if (ENDIAN == ARM::EK_BIG)
return Triple::thumbeb;
}
static Triple::SubArchType parseSubArch(StringRef SubArchName) {
- StringRef ARMSubArch = ARMTargetParser::getCanonicalArchName(SubArchName);
+ StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
// For now, this is the small part. Early return.
if (ARMSubArch.empty())
.Default(Triple::NoSubArch);
// ARM sub arch.
- switch(ARMTargetParser::parseArch(ARMSubArch)) {
+ switch(ARM::parseArch(ARMSubArch)) {
case ARM::AK_ARMV4:
return Triple::NoSubArch;
case ARM::AK_ARMV4T:
const char *Triple::getARMCPUForArch(StringRef MArch) const {
if (MArch.empty())
MArch = getArchName();
- MArch = ARMTargetParser::getCanonicalArchName(MArch);
+ MArch = ARM::getCanonicalArchName(MArch);
// Some defaults are forced.
switch (getOS()) {
if (MArch.empty())
return nullptr;
- const char *CPU = ARMTargetParser::getDefaultCPU(MArch);
+ const char *CPU = ARM::getDefaultCPU(MArch);
if (CPU)
return CPU;
bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
StringRef Arch = getParser().parseStringToEndOfStatement().trim();
- unsigned ID = ARMTargetParser::parseArch(Arch);
+ unsigned ID = ARM::parseArch(Arch);
if (ID == ARM::AK_INVALID) {
Error(L, "Unknown arch name");
SMLoc FPUNameLoc = getTok().getLoc();
StringRef FPU = getParser().parseStringToEndOfStatement().trim();
- unsigned ID = ARMTargetParser::parseFPU(FPU);
+ unsigned ID = ARM::parseFPU(FPU);
std::vector<const char *> Features;
- if (!ARMTargetParser::getFPUFeatures(ID, Features)) {
+ if (!ARM::getFPUFeatures(ID, Features)) {
Error(FPUNameLoc, "Unknown FPU name");
return false;
}
SMLoc ArchLoc = Parser.getTok().getLoc();
getLexer().Lex();
- unsigned ID = ARMTargetParser::parseArch(Arch);
+ unsigned ID = ARM::parseArch(Arch);
if (ID == ARM::AK_INVALID) {
Error(ArchLoc, "unknown architecture '" + Arch + "'");
EnableFeature = false;
Name = Name.substr(2);
}
- unsigned FeatureKind = ARMTargetParser::parseArchExt(Name);
+ unsigned FeatureKind = ARM::parseArchExt(Name);
if (FeatureKind == ARM::AEK_INVALID)
Error(ExtLoc, "unknown architectural extension: " + Name);
}
static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) {
- unsigned AK = ARMTargetParser::parseArch(Arch);
+ unsigned AK = ARM::parseArch(Arch);
switch (AK) {
default:
return MachO::CPU_SUBTYPE_ARM_V7;
OS << "\n";
}
void ARMTargetAsmStreamer::emitArch(unsigned Arch) {
- OS << "\t.arch\t" << ARMTargetParser::getArchName(Arch) << "\n";
+ OS << "\t.arch\t" << ARM::getArchName(Arch) << "\n";
}
void ARMTargetAsmStreamer::emitArchExtension(unsigned ArchExt) {
- OS << "\t.arch_extension\t" << ARMTargetParser::getArchExtName(ArchExt) << "\n";
+ OS << "\t.arch_extension\t" << ARM::getArchExtName(ArchExt) << "\n";
}
void ARMTargetAsmStreamer::emitObjectArch(unsigned Arch) {
- OS << "\t.object_arch\t" << ARMTargetParser::getArchName(Arch) << '\n';
+ OS << "\t.object_arch\t" << ARM::getArchName(Arch) << '\n';
}
void ARMTargetAsmStreamer::emitFPU(unsigned FPU) {
- OS << "\t.fpu\t" << ARMTargetParser::getFPUName(FPU) << "\n";
+ OS << "\t.fpu\t" << ARM::getFPUName(FPU) << "\n";
}
void ARMTargetAsmStreamer::finishAttributeSection() {
}
using namespace ARMBuildAttrs;
setAttributeItem(CPU_name,
- ARMTargetParser::getCPUAttr(Arch),
+ ARM::getCPUAttr(Arch),
false);
if (EmittedArch == ARM::AK_INVALID)
setAttributeItem(CPU_arch,
- ARMTargetParser::getArchAttr(Arch),
+ ARM::getArchAttr(Arch),
false);
else
setAttributeItem(CPU_arch,
- ARMTargetParser::getArchAttr(EmittedArch),
+ ARM::getArchAttr(EmittedArch),
false);
switch (Arch) {