drm/nouveau/sw: rename from software (no binary change)
authorBen Skeggs <bskeggs@redhat.com>
Wed, 14 Jan 2015 02:34:00 +0000 (12:34 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 22 Jan 2015 02:17:47 +0000 (12:17 +1000)
Shorter device name, make consistent with our engine enums.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
36 files changed:
drivers/gpu/drm/nouveau/include/nvif/device.h
drivers/gpu/drm/nouveau/include/nvkm/engine/software.h [deleted file]
drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nouveau_chan.c
drivers/gpu/drm/nouveau/nouveau_drm.c
drivers/gpu/drm/nouveau/nouveau_reg.h
drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm204.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv84.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv94.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nva0.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nva3.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nve0.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nvf0.c
drivers/gpu/drm/nouveau/nvkm/engine/software/Kbuild [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/software/nv04.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/software/nv10.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.h [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/software/nvc0.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/sw/Kbuild [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/sw/nvc0.c [new file with mode: 0644]

index 7f1770beff21d9bb0c01ad72bc74eac1f8656f79..90e2d9706f23feb5fd798451b58e7a7d23f1de30 100644 (file)
@@ -53,7 +53,7 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **);
 #include <engine/device.h>
 #include <engine/fifo.h>
 #include <engine/gr.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 
 #define nvkm_fifo(a) nouveau_fifo(nvkm_device(a))
 #define nvkm_fifo_chan(a) ((struct nouveau_fifo_chan *)nvkm_object(a))
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h
deleted file mode 100644 (file)
index 23a462b..0000000
+++ /dev/null
@@ -1,51 +0,0 @@
-#ifndef __NOUVEAU_SOFTWARE_H__
-#define __NOUVEAU_SOFTWARE_H__
-
-#include <core/engine.h>
-#include <core/engctx.h>
-
-struct nouveau_software_chan {
-       struct nouveau_engctx base;
-
-       int (*flip)(void *);
-       void *flip_data;
-};
-
-#define nouveau_software_context_create(p,e,c,d)                               \
-       nouveau_engctx_create((p), (e), (c), (p), 0, 0, 0, (d))
-#define nouveau_software_context_destroy(d)                                    \
-       nouveau_engctx_destroy(&(d)->base)
-#define nouveau_software_context_init(d)                                       \
-       nouveau_engctx_init(&(d)->base)
-#define nouveau_software_context_fini(d,s)                                     \
-       nouveau_engctx_fini(&(d)->base, (s))
-
-#define _nouveau_software_context_dtor _nouveau_engctx_dtor
-#define _nouveau_software_context_init _nouveau_engctx_init
-#define _nouveau_software_context_fini _nouveau_engctx_fini
-
-struct nouveau_software {
-       struct nouveau_engine base;
-};
-
-#define nouveau_software_create(p,e,c,d)                                       \
-       nouveau_engine_create((p), (e), (c), true, "SW", "software", (d))
-#define nouveau_software_destroy(d)                                            \
-       nouveau_engine_destroy(&(d)->base)
-#define nouveau_software_init(d)                                               \
-       nouveau_engine_init(&(d)->base)
-#define nouveau_software_fini(d,s)                                             \
-       nouveau_engine_fini(&(d)->base, (s))
-
-#define _nouveau_software_dtor _nouveau_engine_dtor
-#define _nouveau_software_init _nouveau_engine_init
-#define _nouveau_software_fini _nouveau_engine_fini
-
-extern struct nouveau_oclass *nv04_software_oclass;
-extern struct nouveau_oclass *nv10_software_oclass;
-extern struct nouveau_oclass *nv50_software_oclass;
-extern struct nouveau_oclass *nvc0_software_oclass;
-
-void nv04_software_intr(struct nouveau_subdev *);
-
-#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h
new file mode 100644 (file)
index 0000000..4c61a39
--- /dev/null
@@ -0,0 +1,51 @@
+#ifndef __NOUVEAU_SW_H__
+#define __NOUVEAU_SW_H__
+
+#include <core/engine.h>
+#include <core/engctx.h>
+
+struct nouveau_sw_chan {
+       struct nouveau_engctx base;
+
+       int (*flip)(void *);
+       void *flip_data;
+};
+
+#define nouveau_sw_context_create(p,e,c,d)                               \
+       nouveau_engctx_create((p), (e), (c), (p), 0, 0, 0, (d))
+#define nouveau_sw_context_destroy(d)                                    \
+       nouveau_engctx_destroy(&(d)->base)
+#define nouveau_sw_context_init(d)                                       \
+       nouveau_engctx_init(&(d)->base)
+#define nouveau_sw_context_fini(d,s)                                     \
+       nouveau_engctx_fini(&(d)->base, (s))
+
+#define _nouveau_sw_context_dtor _nouveau_engctx_dtor
+#define _nouveau_sw_context_init _nouveau_engctx_init
+#define _nouveau_sw_context_fini _nouveau_engctx_fini
+
+struct nouveau_sw {
+       struct nouveau_engine base;
+};
+
+#define nouveau_sw_create(p,e,c,d)                                       \
+       nouveau_engine_create((p), (e), (c), true, "SW", "software", (d))
+#define nouveau_sw_destroy(d)                                            \
+       nouveau_engine_destroy(&(d)->base)
+#define nouveau_sw_init(d)                                               \
+       nouveau_engine_init(&(d)->base)
+#define nouveau_sw_fini(d,s)                                             \
+       nouveau_engine_fini(&(d)->base, (s))
+
+#define _nouveau_sw_dtor _nouveau_engine_dtor
+#define _nouveau_sw_init _nouveau_engine_init
+#define _nouveau_sw_fini _nouveau_engine_fini
+
+extern struct nouveau_oclass *nv04_sw_oclass;
+extern struct nouveau_oclass *nv10_sw_oclass;
+extern struct nouveau_oclass *nv50_sw_oclass;
+extern struct nouveau_oclass *nvc0_sw_oclass;
+
+void nv04_sw_intr(struct nouveau_subdev *);
+
+#endif
index 80302530ead79d549e0a0df4654187b6e62c965d..58b8b6423026b2f866e8a58a1c518543f4828fec 100644 (file)
@@ -282,7 +282,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
        struct nvif_device *device = chan->device;
        struct nouveau_cli *cli = (void *)nvif_client(&device->base);
        struct nouveau_mmu *mmu = nvkm_mmu(device);
-       struct nouveau_software_chan *swch;
+       struct nouveau_sw_chan *swch;
        struct nv_dma_v0 args = {};
        int ret, i;
 
index 1118efa5681790afae4206fddfc5839bf35fadc5..e684040ccf111a44b81dd0bdb49d60ba2ebd1459 100644 (file)
@@ -231,7 +231,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
        ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
                               nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
        if (ret == 0) {
-               struct nouveau_software_chan *swch;
+               struct nouveau_sw_chan *swch;
                ret = RING_SPACE(drm->channel, 2);
                if (ret == 0) {
                        if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
index 43a96b99e18079ba0b808f08c61cb3437e8ebd10..7226f1f609014e9249c2156dbdc523531e21352c 100644 (file)
@@ -72,7 +72,7 @@
 #    define NV_RAMHT_CONTEXT_VALID                         (1<<31)
 #    define NV_RAMHT_CONTEXT_CHANNEL_SHIFT                 24
 #    define NV_RAMHT_CONTEXT_ENGINE_SHIFT                  16
-#        define NV_RAMHT_CONTEXT_ENGINE_SOFTWARE           0
+#        define NV_RAMHT_CONTEXT_ENGINE_SW           0
 #        define NV_RAMHT_CONTEXT_ENGINE_GRAPHICS           1
 #    define NV_RAMHT_CONTEXT_INSTANCE_SHIFT                0
 #    define NV40_RAMHT_CONTEXT_CHANNEL_SHIFT               23
index 0607d595f6e77c9a3e3d907e5308da660656e33d..bc51b0581ba51623bd3ec41afc6694c776746ac9 100644 (file)
@@ -14,5 +14,5 @@ include $(src)/nvkm/engine/msvld/Kbuild
 include $(src)/nvkm/engine/pm/Kbuild
 include $(src)/nvkm/engine/msppp/Kbuild
 include $(src)/nvkm/engine/sec/Kbuild
-include $(src)/nvkm/engine/software/Kbuild
+include $(src)/nvkm/engine/sw/Kbuild
 include $(src)/nvkm/engine/vp/Kbuild
index 69025050333248406052ed73451d794a8f2ddc89..55e463396c8c61c344e0ec43b4f7923e211a6fd8 100644 (file)
@@ -45,7 +45,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/disp.h>
 #include <engine/ce.h>
@@ -85,7 +85,7 @@ gm100_identify(struct nouveau_device *device)
 #endif
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
@@ -129,7 +129,7 @@ gm100_identify(struct nouveau_device *device)
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
 #if 0
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
 #endif
                device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;
index dcb53917b5e0873c08a25d9ce8e125ce0aa5c18a..1d409af560da5b5a6c497d7ac5a36ffb7c9326e0 100644 (file)
@@ -36,7 +36,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/disp.h>
 
@@ -58,7 +58,7 @@ nv04_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv04_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv04_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv04_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -76,7 +76,7 @@ nv04_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv04_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv04_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv04_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
index f292e7b88628c1e6b10eed2c7d7c5e719854b8e2..66d8c338ae985e3110d91daa79aa8bafe1b32721 100644 (file)
@@ -37,7 +37,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/disp.h>
 
@@ -77,7 +77,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -96,7 +96,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -115,7 +115,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -134,7 +134,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -153,7 +153,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -172,7 +172,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -191,7 +191,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
index a03420ca82b107cb8859c1df0b003811983c6249..59cefdd46897747ffcf5fce7f0c900455b5d84da 100644 (file)
@@ -38,7 +38,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/disp.h>
 
@@ -61,7 +61,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv20_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -80,7 +80,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv25_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -99,7 +99,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv25_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -118,7 +118,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv2a_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
index 59b6baa64b4c4fe2f8616c265415d14b1bd1eb99..dfb610f837b02825e151112ee32a9515c4e53611 100644 (file)
@@ -37,7 +37,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/mpeg.h>
 #include <engine/disp.h>
@@ -61,7 +61,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv30_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -80,7 +80,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv35_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
@@ -99,7 +99,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv30_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -119,7 +119,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv35_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -139,7 +139,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_MMU    ] = &nv04_mmu_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv34_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
index cd859b081db481d2af36a58070592cf545f5f58a..7bdb7d6729b7bacdce2d63cc7f9fa243118dc512 100644 (file)
@@ -40,7 +40,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/mpeg.h>
 #include <engine/disp.h>
@@ -67,7 +67,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -90,7 +90,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -113,7 +113,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -136,7 +136,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -159,7 +159,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -182,7 +182,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -205,7 +205,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -228,7 +228,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -251,7 +251,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -274,7 +274,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -297,7 +297,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -320,7 +320,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -343,7 +343,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -366,7 +366,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -389,7 +389,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
@@ -412,7 +412,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv40_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
index 3f3d2ea1a93051be20c044d9911f75094a8746f1..13203f53c80d5a3c7ca480e19809011291244f8e 100644 (file)
@@ -43,7 +43,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/mpeg.h>
 #include <engine/vp.h>
@@ -80,7 +80,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv50_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv50_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv50_disp_oclass;
@@ -106,7 +106,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
@@ -135,7 +135,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
@@ -164,7 +164,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
@@ -193,7 +193,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
@@ -222,7 +222,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
@@ -251,7 +251,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_SEC    ] = &nv98_sec_oclass;
@@ -280,7 +280,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
@@ -309,7 +309,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_SEC    ] = &nv98_sec_oclass;
@@ -338,7 +338,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_SEC    ] = &nv98_sec_oclass;
@@ -368,7 +368,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
@@ -399,7 +399,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
@@ -429,7 +429,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
@@ -459,7 +459,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nv50_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv50_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;
index b241421e76a25913703917333ea002c6a9ceb58a..ae856f8bcc75933b3fc90462b4202333bf13dc8e 100644 (file)
@@ -45,7 +45,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/vp.h>
 #include <engine/bsp.h>
@@ -82,7 +82,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc0_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -115,7 +115,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -148,7 +148,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -180,7 +180,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -213,7 +213,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -245,7 +245,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc1_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -277,7 +277,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvc8_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -310,7 +310,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvd9_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
@@ -340,7 +340,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &nvc0_bar_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvd7_gr_oclass;
                device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;
                device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;
index df975987b9ca73f4e60bbb6880c45c22df3b8142..13934f2b9cbdf70fdbd9355cd7c0c06767a67cf8 100644 (file)
@@ -45,7 +45,7 @@
 #include <engine/device.h>
 #include <engine/dmaobj.h>
 #include <engine/fifo.h>
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/gr.h>
 #include <engine/disp.h>
 #include <engine/ce.h>
@@ -82,7 +82,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
@@ -116,7 +116,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
@@ -150,7 +150,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
@@ -176,7 +176,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BAR    ] = &gk20a_bar_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_gr_oclass;
                device->oclass[NVDEV_ENGINE_CE2    ] = &nve0_ce2_oclass;
                device->oclass[NVDEV_ENGINE_PM     ] = &nve0_pm_oclass;
@@ -206,7 +206,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
@@ -240,7 +240,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
@@ -274,7 +274,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
@@ -307,7 +307,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
-               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
                device->oclass[NVDEV_ENGINE_CE0    ] = &nve0_ce0_oclass;
index e2ad0543fb31e252d5662da41da258c4845b543e..26aaa2a201e5092544a80829f8430d49605b96a9 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
index 672ded79b2a9b002acfbc664893233dd9cc439e0..40b44f9909905941db401c7d1ea1a9dadcad4921 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
index 13eff5e4ee515e638070374ca1615acb095b7120..547926678710fd57bf851d01e7d3434d7e899ed1 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
index 2bb7ac5cd0e65d22fbce59dbfd9e1a915790cd26..c009be4fb11cc55463c19531561cbcc8c6631c14 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
index b32456c9494fcf9432de07ca6de65b5c236bd4a8..317fd1a220767b4d4c9ea97653e1acbca105743a 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
index 951d79f9b781974bedfa39376464ced4731ef27c..af94413382397141dd0a5a46e6b09c33131af788 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
index 55debec7e68f7d7b1009f80864dd3833ae8674d1..063cb4ad304ca69f2fea532d57f0ccfcf93b1d85 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
index 3e7e2d28744c48b8e6f725e19bbbf7343013f452..3fd9b462d51fc500891d4c26f3d99db5fc5b81ca 100644 (file)
@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <engine/software.h>
+#include <engine/sw.h>
 #include <engine/disp.h>
 
 #include <nvif/class.h>
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/software/Kbuild
deleted file mode 100644 (file)
index e1332a1..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-nvkm-y += nvkm/engine/software/nv04.o
-nvkm-y += nvkm/engine/software/nv10.o
-nvkm-y += nvkm/engine/software/nv50.o
-nvkm-y += nvkm/engine/software/nvc0.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/software/nv04.c
deleted file mode 100644 (file)
index 64df15c..0000000
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <core/os.h>
-#include <core/engctx.h>
-
-#include <engine/software.h>
-#include <engine/fifo.h>
-
-struct nv04_software_priv {
-       struct nouveau_software base;
-};
-
-struct nv04_software_chan {
-       struct nouveau_software_chan base;
-};
-
-/*******************************************************************************
- * software object classes
- ******************************************************************************/
-
-static int
-nv04_software_set_ref(struct nouveau_object *object, u32 mthd,
-                     void *data, u32 size)
-{
-       struct nouveau_object *channel = (void *)nv_engctx(object->parent);
-       struct nouveau_fifo_chan *fifo = (void *)channel->parent;
-       atomic_set(&fifo->refcnt, *(u32*)data);
-       return 0;
-}
-
-static int
-nv04_software_flip(struct nouveau_object *object, u32 mthd,
-                  void *args, u32 size)
-{
-       struct nv04_software_chan *chan = (void *)nv_engctx(object->parent);
-       if (chan->base.flip)
-               return chan->base.flip(chan->base.flip_data);
-       return -EINVAL;
-}
-
-static struct nouveau_omthds
-nv04_software_omthds[] = {
-       { 0x0150, 0x0150, nv04_software_set_ref },
-       { 0x0500, 0x0500, nv04_software_flip },
-       {}
-};
-
-static struct nouveau_oclass
-nv04_software_sclass[] = {
-       { 0x006e, &nouveau_object_ofuncs, nv04_software_omthds },
-       {}
-};
-
-/*******************************************************************************
- * software context
- ******************************************************************************/
-
-static int
-nv04_software_context_ctor(struct nouveau_object *parent,
-                     struct nouveau_object *engine,
-                     struct nouveau_oclass *oclass, void *data, u32 size,
-                     struct nouveau_object **pobject)
-{
-       struct nv04_software_chan *chan;
-       int ret;
-
-       ret = nouveau_software_context_create(parent, engine, oclass, &chan);
-       *pobject = nv_object(chan);
-       if (ret)
-               return ret;
-
-       return 0;
-}
-
-static struct nouveau_oclass
-nv04_software_cclass = {
-       .handle = NV_ENGCTX(SW, 0x04),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv04_software_context_ctor,
-               .dtor = _nouveau_software_context_dtor,
-               .init = _nouveau_software_context_init,
-               .fini = _nouveau_software_context_fini,
-       },
-};
-
-/*******************************************************************************
- * software engine/subdev functions
- ******************************************************************************/
-
-void
-nv04_software_intr(struct nouveau_subdev *subdev)
-{
-       nv_mask(subdev, 0x000100, 0x80000000, 0x00000000);
-}
-
-static int
-nv04_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-             struct nouveau_oclass *oclass, void *data, u32 size,
-             struct nouveau_object **pobject)
-{
-       struct nv04_software_priv *priv;
-       int ret;
-
-       ret = nouveau_software_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_engine(priv)->cclass = &nv04_software_cclass;
-       nv_engine(priv)->sclass = nv04_software_sclass;
-       nv_subdev(priv)->intr = nv04_software_intr;
-       return 0;
-}
-
-struct nouveau_oclass *
-nv04_software_oclass = &(struct nouveau_oclass) {
-       .handle = NV_ENGINE(SW, 0x04),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv04_software_ctor,
-               .dtor = _nouveau_software_dtor,
-               .init = _nouveau_software_init,
-               .fini = _nouveau_software_fini,
-       },
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/software/nv10.c
deleted file mode 100644 (file)
index f54a225..0000000
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <core/os.h>
-#include <core/engctx.h>
-
-#include <engine/software.h>
-
-struct nv10_software_priv {
-       struct nouveau_software base;
-};
-
-struct nv10_software_chan {
-       struct nouveau_software_chan base;
-};
-
-/*******************************************************************************
- * software object classes
- ******************************************************************************/
-
-static int
-nv10_software_flip(struct nouveau_object *object, u32 mthd,
-                  void *args, u32 size)
-{
-       struct nv10_software_chan *chan = (void *)nv_engctx(object->parent);
-       if (chan->base.flip)
-               return chan->base.flip(chan->base.flip_data);
-       return -EINVAL;
-}
-
-static struct nouveau_omthds
-nv10_software_omthds[] = {
-       { 0x0500, 0x0500, nv10_software_flip },
-       {}
-};
-
-static struct nouveau_oclass
-nv10_software_sclass[] = {
-       { 0x016e, &nouveau_object_ofuncs, nv10_software_omthds },
-       {}
-};
-
-/*******************************************************************************
- * software context
- ******************************************************************************/
-
-static int
-nv10_software_context_ctor(struct nouveau_object *parent,
-                     struct nouveau_object *engine,
-                     struct nouveau_oclass *oclass, void *data, u32 size,
-                     struct nouveau_object **pobject)
-{
-       struct nv10_software_chan *chan;
-       int ret;
-
-       ret = nouveau_software_context_create(parent, engine, oclass, &chan);
-       *pobject = nv_object(chan);
-       if (ret)
-               return ret;
-
-       return 0;
-}
-
-static struct nouveau_oclass
-nv10_software_cclass = {
-       .handle = NV_ENGCTX(SW, 0x04),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv10_software_context_ctor,
-               .dtor = _nouveau_software_context_dtor,
-               .init = _nouveau_software_context_init,
-               .fini = _nouveau_software_context_fini,
-       },
-};
-
-/*******************************************************************************
- * software engine/subdev functions
- ******************************************************************************/
-
-static int
-nv10_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-             struct nouveau_oclass *oclass, void *data, u32 size,
-             struct nouveau_object **pobject)
-{
-       struct nv10_software_priv *priv;
-       int ret;
-
-       ret = nouveau_software_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_engine(priv)->cclass = &nv10_software_cclass;
-       nv_engine(priv)->sclass = nv10_software_sclass;
-       nv_subdev(priv)->intr = nv04_software_intr;
-       return 0;
-}
-
-struct nouveau_oclass *
-nv10_software_oclass = &(struct nouveau_oclass) {
-       .handle = NV_ENGINE(SW, 0x10),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv10_software_ctor,
-               .dtor = _nouveau_software_dtor,
-               .init = _nouveau_software_init,
-               .fini = _nouveau_software_fini,
-       },
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.c
deleted file mode 100644 (file)
index a0fec20..0000000
+++ /dev/null
@@ -1,241 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <core/os.h>
-#include <core/engctx.h>
-#include <core/namedb.h>
-#include <core/handle.h>
-#include <core/gpuobj.h>
-#include <core/event.h>
-#include <nvif/event.h>
-
-#include <subdev/bar.h>
-
-#include <engine/disp.h>
-
-#include "nv50.h"
-
-/*******************************************************************************
- * software object classes
- ******************************************************************************/
-
-static int
-nv50_software_mthd_dma_vblsem(struct nouveau_object *object, u32 mthd,
-                             void *args, u32 size)
-{
-       struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
-       struct nouveau_fifo_chan *fifo = (void *)nv_object(chan)->parent;
-       struct nouveau_handle *handle;
-       int ret = -EINVAL;
-
-       handle = nouveau_namedb_get(nv_namedb(fifo), *(u32 *)args);
-       if (!handle)
-               return -ENOENT;
-
-       if (nv_iclass(handle->object, NV_GPUOBJ_CLASS)) {
-               struct nouveau_gpuobj *gpuobj = nv_gpuobj(handle->object);
-               chan->vblank.ctxdma = gpuobj->node->offset >> 4;
-               ret = 0;
-       }
-       nouveau_namedb_put(handle);
-       return ret;
-}
-
-static int
-nv50_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
-                                void *args, u32 size)
-{
-       struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
-       chan->vblank.offset = *(u32 *)args;
-       return 0;
-}
-
-int
-nv50_software_mthd_vblsem_value(struct nouveau_object *object, u32 mthd,
-                               void *args, u32 size)
-{
-       struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
-       chan->vblank.value = *(u32 *)args;
-       return 0;
-}
-
-int
-nv50_software_mthd_vblsem_release(struct nouveau_object *object, u32 mthd,
-                                 void *args, u32 size)
-{
-       struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
-       u32 head = *(u32 *)args;
-       if (head >= nouveau_disp(chan)->vblank.index_nr)
-               return -EINVAL;
-
-       nvkm_notify_get(&chan->vblank.notify[head]);
-       return 0;
-}
-
-int
-nv50_software_mthd_flip(struct nouveau_object *object, u32 mthd,
-                       void *args, u32 size)
-{
-       struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
-       if (chan->base.flip)
-               return chan->base.flip(chan->base.flip_data);
-       return -EINVAL;
-}
-
-static struct nouveau_omthds
-nv50_software_omthds[] = {
-       { 0x018c, 0x018c, nv50_software_mthd_dma_vblsem },
-       { 0x0400, 0x0400, nv50_software_mthd_vblsem_offset },
-       { 0x0404, 0x0404, nv50_software_mthd_vblsem_value },
-       { 0x0408, 0x0408, nv50_software_mthd_vblsem_release },
-       { 0x0500, 0x0500, nv50_software_mthd_flip },
-       {}
-};
-
-static struct nouveau_oclass
-nv50_software_sclass[] = {
-       { 0x506e, &nouveau_object_ofuncs, nv50_software_omthds },
-       {}
-};
-
-/*******************************************************************************
- * software context
- ******************************************************************************/
-
-static int
-nv50_software_vblsem_release(struct nvkm_notify *notify)
-{
-       struct nv50_software_chan *chan =
-               container_of(notify, typeof(*chan), vblank.notify[notify->index]);
-       struct nv50_software_priv *priv = (void *)nv_object(chan)->engine;
-       struct nouveau_bar *bar = nouveau_bar(priv);
-
-       nv_wr32(priv, 0x001704, chan->vblank.channel);
-       nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
-       bar->flush(bar);
-
-       if (nv_device(priv)->chipset == 0x50) {
-               nv_wr32(priv, 0x001570, chan->vblank.offset);
-               nv_wr32(priv, 0x001574, chan->vblank.value);
-       } else {
-               nv_wr32(priv, 0x060010, chan->vblank.offset);
-               nv_wr32(priv, 0x060014, chan->vblank.value);
-       }
-
-       return NVKM_NOTIFY_DROP;
-}
-
-void
-nv50_software_context_dtor(struct nouveau_object *object)
-{
-       struct nv50_software_chan *chan = (void *)object;
-       int i;
-
-       for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++)
-               nvkm_notify_fini(&chan->vblank.notify[i]);
-
-       nouveau_software_context_destroy(&chan->base);
-}
-
-int
-nv50_software_context_ctor(struct nouveau_object *parent,
-                          struct nouveau_object *engine,
-                          struct nouveau_oclass *oclass, void *data, u32 size,
-                          struct nouveau_object **pobject)
-{
-       struct nouveau_disp *pdisp = nouveau_disp(parent);
-       struct nv50_software_cclass *pclass = (void *)oclass;
-       struct nv50_software_chan *chan;
-       int ret, i;
-
-       ret = nouveau_software_context_create(parent, engine, oclass, &chan);
-       *pobject = nv_object(chan);
-       if (ret)
-               return ret;
-
-       for (i = 0; pdisp && i < pdisp->vblank.index_nr; i++) {
-               ret = nvkm_notify_init(NULL, &pdisp->vblank, pclass->vblank,
-                                      false,
-                                      &(struct nvif_notify_head_req_v0) {
-                                       .head = i,
-                                      },
-                                      sizeof(struct nvif_notify_head_req_v0),
-                                      sizeof(struct nvif_notify_head_rep_v0),
-                                      &chan->vblank.notify[i]);
-               if (ret)
-                       return ret;
-       }
-
-       chan->vblank.channel = nv_gpuobj(parent->parent)->addr >> 12;
-       return 0;
-}
-
-static struct nv50_software_cclass
-nv50_software_cclass = {
-       .base.handle = NV_ENGCTX(SW, 0x50),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_software_context_ctor,
-               .dtor = nv50_software_context_dtor,
-               .init = _nouveau_software_context_init,
-               .fini = _nouveau_software_context_fini,
-       },
-       .vblank = nv50_software_vblsem_release,
-};
-
-/*******************************************************************************
- * software engine/subdev functions
- ******************************************************************************/
-
-int
-nv50_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                  struct nouveau_oclass *oclass, void *data, u32 size,
-                  struct nouveau_object **pobject)
-{
-       struct nv50_software_oclass *pclass = (void *)oclass;
-       struct nv50_software_priv *priv;
-       int ret;
-
-       ret = nouveau_software_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       nv_engine(priv)->cclass = pclass->cclass;
-       nv_engine(priv)->sclass = pclass->sclass;
-       nv_subdev(priv)->intr = nv04_software_intr;
-       return 0;
-}
-
-struct nouveau_oclass *
-nv50_software_oclass = &(struct nv50_software_oclass) {
-       .base.handle = NV_ENGINE(SW, 0x50),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_software_ctor,
-               .dtor = _nouveau_software_dtor,
-               .init = _nouveau_software_init,
-               .fini = _nouveau_software_fini,
-       },
-       .cclass = &nv50_software_cclass.base,
-       .sclass =  nv50_software_sclass,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.h
deleted file mode 100644 (file)
index 41542e7..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-#ifndef __NVKM_SW_NV50_H__
-#define __NVKM_SW_NV50_H__
-
-#include <engine/software.h>
-
-struct nv50_software_oclass {
-       struct nouveau_oclass base;
-       struct nouveau_oclass *cclass;
-       struct nouveau_oclass *sclass;
-};
-
-struct nv50_software_priv {
-       struct nouveau_software base;
-};
-
-int  nv50_software_ctor(struct nouveau_object *, struct nouveau_object *,
-                       struct nouveau_oclass *, void *, u32,
-                       struct nouveau_object **);
-
-struct nv50_software_cclass {
-       struct nouveau_oclass base;
-       int (*vblank)(struct nvkm_notify *);
-};
-
-struct nv50_software_chan {
-       struct nouveau_software_chan base;
-       struct {
-               struct nvkm_notify notify[4];
-               u32 channel;
-               u32 ctxdma;
-               u64 offset;
-               u32 value;
-       } vblank;
-};
-
-int  nv50_software_context_ctor(struct nouveau_object *,
-                               struct nouveau_object *,
-                               struct nouveau_oclass *, void *, u32,
-                               struct nouveau_object **);
-void nv50_software_context_dtor(struct nouveau_object *);
-
-int nv50_software_mthd_vblsem_value(struct nouveau_object *, u32, void *, u32);
-int nv50_software_mthd_vblsem_release(struct nouveau_object *, u32, void *, u32);
-int nv50_software_mthd_flip(struct nouveau_object *, u32, void *, u32);
-
-#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/software/nvc0.c
deleted file mode 100644 (file)
index 6af370d..0000000
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <core/os.h>
-#include <core/engctx.h>
-#include <core/event.h>
-
-#include <subdev/bar.h>
-
-#include <engine/software.h>
-#include <engine/disp.h>
-
-#include "nv50.h"
-
-/*******************************************************************************
- * software object classes
- ******************************************************************************/
-
-static int
-nvc0_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
-                                void *args, u32 size)
-{
-       struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
-       u64 data = *(u32 *)args;
-       if (mthd == 0x0400) {
-               chan->vblank.offset &= 0x00ffffffffULL;
-               chan->vblank.offset |= data << 32;
-       } else {
-               chan->vblank.offset &= 0xff00000000ULL;
-               chan->vblank.offset |= data;
-       }
-       return 0;
-}
-
-static int
-nvc0_software_mthd_mp_control(struct nouveau_object *object, u32 mthd,
-                              void *args, u32 size)
-{
-       struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
-       struct nv50_software_priv *priv = (void *)nv_object(chan)->engine;
-       u32 data = *(u32 *)args;
-
-       switch (mthd) {
-       case 0x600:
-               nv_wr32(priv, 0x419e00, data); /* MP.PM_UNK000 */
-               break;
-       case 0x644:
-               if (data & ~0x1ffffe)
-                       return -EINVAL;
-               nv_wr32(priv, 0x419e44, data); /* MP.TRAP_WARP_ERROR_EN */
-               break;
-       case 0x6ac:
-               nv_wr32(priv, 0x419eac, data); /* MP.PM_UNK0AC */
-               break;
-       default:
-               return -EINVAL;
-       }
-       return 0;
-}
-
-static struct nouveau_omthds
-nvc0_software_omthds[] = {
-       { 0x0400, 0x0400, nvc0_software_mthd_vblsem_offset },
-       { 0x0404, 0x0404, nvc0_software_mthd_vblsem_offset },
-       { 0x0408, 0x0408, nv50_software_mthd_vblsem_value },
-       { 0x040c, 0x040c, nv50_software_mthd_vblsem_release },
-       { 0x0500, 0x0500, nv50_software_mthd_flip },
-       { 0x0600, 0x0600, nvc0_software_mthd_mp_control },
-       { 0x0644, 0x0644, nvc0_software_mthd_mp_control },
-       { 0x06ac, 0x06ac, nvc0_software_mthd_mp_control },
-       {}
-};
-
-static struct nouveau_oclass
-nvc0_software_sclass[] = {
-       { 0x906e, &nouveau_object_ofuncs, nvc0_software_omthds },
-       {}
-};
-
-/*******************************************************************************
- * software context
- ******************************************************************************/
-
-static int
-nvc0_software_vblsem_release(struct nvkm_notify *notify)
-{
-       struct nv50_software_chan *chan =
-               container_of(notify, typeof(*chan), vblank.notify[notify->index]);
-       struct nv50_software_priv *priv = (void *)nv_object(chan)->engine;
-       struct nouveau_bar *bar = nouveau_bar(priv);
-
-       nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel);
-       bar->flush(bar);
-       nv_wr32(priv, 0x06000c, upper_32_bits(chan->vblank.offset));
-       nv_wr32(priv, 0x060010, lower_32_bits(chan->vblank.offset));
-       nv_wr32(priv, 0x060014, chan->vblank.value);
-
-       return NVKM_NOTIFY_DROP;
-}
-
-static struct nv50_software_cclass
-nvc0_software_cclass = {
-       .base.handle = NV_ENGCTX(SW, 0xc0),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_software_context_ctor,
-               .dtor = nv50_software_context_dtor,
-               .init = _nouveau_software_context_init,
-               .fini = _nouveau_software_context_fini,
-       },
-       .vblank = nvc0_software_vblsem_release,
-};
-
-/*******************************************************************************
- * software engine/subdev functions
- ******************************************************************************/
-
-struct nouveau_oclass *
-nvc0_software_oclass = &(struct nv50_software_oclass) {
-       .base.handle = NV_ENGINE(SW, 0xc0),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_software_ctor,
-               .dtor = _nouveau_software_dtor,
-               .init = _nouveau_software_init,
-               .fini = _nouveau_software_fini,
-       },
-       .cclass = &nvc0_software_cclass.base,
-       .sclass =  nvc0_software_sclass,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/sw/Kbuild
new file mode 100644 (file)
index 0000000..b8d2159
--- /dev/null
@@ -0,0 +1,4 @@
+nvkm-y += nvkm/engine/sw/nv04.o
+nvkm-y += nvkm/engine/sw/nv10.o
+nvkm-y += nvkm/engine/sw/nv50.o
+nvkm-y += nvkm/engine/sw/nvc0.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
new file mode 100644 (file)
index 0000000..3d0e4bc
--- /dev/null
@@ -0,0 +1,146 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <core/os.h>
+#include <core/engctx.h>
+
+#include <engine/sw.h>
+#include <engine/fifo.h>
+
+struct nv04_sw_priv {
+       struct nouveau_sw base;
+};
+
+struct nv04_sw_chan {
+       struct nouveau_sw_chan base;
+};
+
+/*******************************************************************************
+ * software object classes
+ ******************************************************************************/
+
+static int
+nv04_sw_set_ref(struct nouveau_object *object, u32 mthd,
+                     void *data, u32 size)
+{
+       struct nouveau_object *channel = (void *)nv_engctx(object->parent);
+       struct nouveau_fifo_chan *fifo = (void *)channel->parent;
+       atomic_set(&fifo->refcnt, *(u32*)data);
+       return 0;
+}
+
+static int
+nv04_sw_flip(struct nouveau_object *object, u32 mthd,
+                  void *args, u32 size)
+{
+       struct nv04_sw_chan *chan = (void *)nv_engctx(object->parent);
+       if (chan->base.flip)
+               return chan->base.flip(chan->base.flip_data);
+       return -EINVAL;
+}
+
+static struct nouveau_omthds
+nv04_sw_omthds[] = {
+       { 0x0150, 0x0150, nv04_sw_set_ref },
+       { 0x0500, 0x0500, nv04_sw_flip },
+       {}
+};
+
+static struct nouveau_oclass
+nv04_sw_sclass[] = {
+       { 0x006e, &nouveau_object_ofuncs, nv04_sw_omthds },
+       {}
+};
+
+/*******************************************************************************
+ * software context
+ ******************************************************************************/
+
+static int
+nv04_sw_context_ctor(struct nouveau_object *parent,
+                     struct nouveau_object *engine,
+                     struct nouveau_oclass *oclass, void *data, u32 size,
+                     struct nouveau_object **pobject)
+{
+       struct nv04_sw_chan *chan;
+       int ret;
+
+       ret = nouveau_sw_context_create(parent, engine, oclass, &chan);
+       *pobject = nv_object(chan);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
+static struct nouveau_oclass
+nv04_sw_cclass = {
+       .handle = NV_ENGCTX(SW, 0x04),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv04_sw_context_ctor,
+               .dtor = _nouveau_sw_context_dtor,
+               .init = _nouveau_sw_context_init,
+               .fini = _nouveau_sw_context_fini,
+       },
+};
+
+/*******************************************************************************
+ * software engine/subdev functions
+ ******************************************************************************/
+
+void
+nv04_sw_intr(struct nouveau_subdev *subdev)
+{
+       nv_mask(subdev, 0x000100, 0x80000000, 0x00000000);
+}
+
+static int
+nv04_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+             struct nouveau_oclass *oclass, void *data, u32 size,
+             struct nouveau_object **pobject)
+{
+       struct nv04_sw_priv *priv;
+       int ret;
+
+       ret = nouveau_sw_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_engine(priv)->cclass = &nv04_sw_cclass;
+       nv_engine(priv)->sclass = nv04_sw_sclass;
+       nv_subdev(priv)->intr = nv04_sw_intr;
+       return 0;
+}
+
+struct nouveau_oclass *
+nv04_sw_oclass = &(struct nouveau_oclass) {
+       .handle = NV_ENGINE(SW, 0x04),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv04_sw_ctor,
+               .dtor = _nouveau_sw_dtor,
+               .init = _nouveau_sw_init,
+               .fini = _nouveau_sw_fini,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c
new file mode 100644 (file)
index 0000000..12775cd
--- /dev/null
@@ -0,0 +1,128 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <core/os.h>
+#include <core/engctx.h>
+
+#include <engine/sw.h>
+
+struct nv10_sw_priv {
+       struct nouveau_sw base;
+};
+
+struct nv10_sw_chan {
+       struct nouveau_sw_chan base;
+};
+
+/*******************************************************************************
+ * software object classes
+ ******************************************************************************/
+
+static int
+nv10_sw_flip(struct nouveau_object *object, u32 mthd,
+                  void *args, u32 size)
+{
+       struct nv10_sw_chan *chan = (void *)nv_engctx(object->parent);
+       if (chan->base.flip)
+               return chan->base.flip(chan->base.flip_data);
+       return -EINVAL;
+}
+
+static struct nouveau_omthds
+nv10_sw_omthds[] = {
+       { 0x0500, 0x0500, nv10_sw_flip },
+       {}
+};
+
+static struct nouveau_oclass
+nv10_sw_sclass[] = {
+       { 0x016e, &nouveau_object_ofuncs, nv10_sw_omthds },
+       {}
+};
+
+/*******************************************************************************
+ * software context
+ ******************************************************************************/
+
+static int
+nv10_sw_context_ctor(struct nouveau_object *parent,
+                     struct nouveau_object *engine,
+                     struct nouveau_oclass *oclass, void *data, u32 size,
+                     struct nouveau_object **pobject)
+{
+       struct nv10_sw_chan *chan;
+       int ret;
+
+       ret = nouveau_sw_context_create(parent, engine, oclass, &chan);
+       *pobject = nv_object(chan);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
+static struct nouveau_oclass
+nv10_sw_cclass = {
+       .handle = NV_ENGCTX(SW, 0x04),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv10_sw_context_ctor,
+               .dtor = _nouveau_sw_context_dtor,
+               .init = _nouveau_sw_context_init,
+               .fini = _nouveau_sw_context_fini,
+       },
+};
+
+/*******************************************************************************
+ * software engine/subdev functions
+ ******************************************************************************/
+
+static int
+nv10_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+             struct nouveau_oclass *oclass, void *data, u32 size,
+             struct nouveau_object **pobject)
+{
+       struct nv10_sw_priv *priv;
+       int ret;
+
+       ret = nouveau_sw_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_engine(priv)->cclass = &nv10_sw_cclass;
+       nv_engine(priv)->sclass = nv10_sw_sclass;
+       nv_subdev(priv)->intr = nv04_sw_intr;
+       return 0;
+}
+
+struct nouveau_oclass *
+nv10_sw_oclass = &(struct nouveau_oclass) {
+       .handle = NV_ENGINE(SW, 0x10),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv10_sw_ctor,
+               .dtor = _nouveau_sw_dtor,
+               .init = _nouveau_sw_init,
+               .fini = _nouveau_sw_fini,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c
new file mode 100644 (file)
index 0000000..a214a4d
--- /dev/null
@@ -0,0 +1,241 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <core/os.h>
+#include <core/engctx.h>
+#include <core/namedb.h>
+#include <core/handle.h>
+#include <core/gpuobj.h>
+#include <core/event.h>
+#include <nvif/event.h>
+
+#include <subdev/bar.h>
+
+#include <engine/disp.h>
+
+#include "nv50.h"
+
+/*******************************************************************************
+ * software object classes
+ ******************************************************************************/
+
+static int
+nv50_sw_mthd_dma_vblsem(struct nouveau_object *object, u32 mthd,
+                             void *args, u32 size)
+{
+       struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
+       struct nouveau_fifo_chan *fifo = (void *)nv_object(chan)->parent;
+       struct nouveau_handle *handle;
+       int ret = -EINVAL;
+
+       handle = nouveau_namedb_get(nv_namedb(fifo), *(u32 *)args);
+       if (!handle)
+               return -ENOENT;
+
+       if (nv_iclass(handle->object, NV_GPUOBJ_CLASS)) {
+               struct nouveau_gpuobj *gpuobj = nv_gpuobj(handle->object);
+               chan->vblank.ctxdma = gpuobj->node->offset >> 4;
+               ret = 0;
+       }
+       nouveau_namedb_put(handle);
+       return ret;
+}
+
+static int
+nv50_sw_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
+                                void *args, u32 size)
+{
+       struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
+       chan->vblank.offset = *(u32 *)args;
+       return 0;
+}
+
+int
+nv50_sw_mthd_vblsem_value(struct nouveau_object *object, u32 mthd,
+                               void *args, u32 size)
+{
+       struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
+       chan->vblank.value = *(u32 *)args;
+       return 0;
+}
+
+int
+nv50_sw_mthd_vblsem_release(struct nouveau_object *object, u32 mthd,
+                                 void *args, u32 size)
+{
+       struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
+       u32 head = *(u32 *)args;
+       if (head >= nouveau_disp(chan)->vblank.index_nr)
+               return -EINVAL;
+
+       nvkm_notify_get(&chan->vblank.notify[head]);
+       return 0;
+}
+
+int
+nv50_sw_mthd_flip(struct nouveau_object *object, u32 mthd,
+                       void *args, u32 size)
+{
+       struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
+       if (chan->base.flip)
+               return chan->base.flip(chan->base.flip_data);
+       return -EINVAL;
+}
+
+static struct nouveau_omthds
+nv50_sw_omthds[] = {
+       { 0x018c, 0x018c, nv50_sw_mthd_dma_vblsem },
+       { 0x0400, 0x0400, nv50_sw_mthd_vblsem_offset },
+       { 0x0404, 0x0404, nv50_sw_mthd_vblsem_value },
+       { 0x0408, 0x0408, nv50_sw_mthd_vblsem_release },
+       { 0x0500, 0x0500, nv50_sw_mthd_flip },
+       {}
+};
+
+static struct nouveau_oclass
+nv50_sw_sclass[] = {
+       { 0x506e, &nouveau_object_ofuncs, nv50_sw_omthds },
+       {}
+};
+
+/*******************************************************************************
+ * software context
+ ******************************************************************************/
+
+static int
+nv50_sw_vblsem_release(struct nvkm_notify *notify)
+{
+       struct nv50_sw_chan *chan =
+               container_of(notify, typeof(*chan), vblank.notify[notify->index]);
+       struct nv50_sw_priv *priv = (void *)nv_object(chan)->engine;
+       struct nouveau_bar *bar = nouveau_bar(priv);
+
+       nv_wr32(priv, 0x001704, chan->vblank.channel);
+       nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
+       bar->flush(bar);
+
+       if (nv_device(priv)->chipset == 0x50) {
+               nv_wr32(priv, 0x001570, chan->vblank.offset);
+               nv_wr32(priv, 0x001574, chan->vblank.value);
+       } else {
+               nv_wr32(priv, 0x060010, chan->vblank.offset);
+               nv_wr32(priv, 0x060014, chan->vblank.value);
+       }
+
+       return NVKM_NOTIFY_DROP;
+}
+
+void
+nv50_sw_context_dtor(struct nouveau_object *object)
+{
+       struct nv50_sw_chan *chan = (void *)object;
+       int i;
+
+       for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++)
+               nvkm_notify_fini(&chan->vblank.notify[i]);
+
+       nouveau_sw_context_destroy(&chan->base);
+}
+
+int
+nv50_sw_context_ctor(struct nouveau_object *parent,
+                          struct nouveau_object *engine,
+                          struct nouveau_oclass *oclass, void *data, u32 size,
+                          struct nouveau_object **pobject)
+{
+       struct nouveau_disp *pdisp = nouveau_disp(parent);
+       struct nv50_sw_cclass *pclass = (void *)oclass;
+       struct nv50_sw_chan *chan;
+       int ret, i;
+
+       ret = nouveau_sw_context_create(parent, engine, oclass, &chan);
+       *pobject = nv_object(chan);
+       if (ret)
+               return ret;
+
+       for (i = 0; pdisp && i < pdisp->vblank.index_nr; i++) {
+               ret = nvkm_notify_init(NULL, &pdisp->vblank, pclass->vblank,
+                                      false,
+                                      &(struct nvif_notify_head_req_v0) {
+                                       .head = i,
+                                      },
+                                      sizeof(struct nvif_notify_head_req_v0),
+                                      sizeof(struct nvif_notify_head_rep_v0),
+                                      &chan->vblank.notify[i]);
+               if (ret)
+                       return ret;
+       }
+
+       chan->vblank.channel = nv_gpuobj(parent->parent)->addr >> 12;
+       return 0;
+}
+
+static struct nv50_sw_cclass
+nv50_sw_cclass = {
+       .base.handle = NV_ENGCTX(SW, 0x50),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv50_sw_context_ctor,
+               .dtor = nv50_sw_context_dtor,
+               .init = _nouveau_sw_context_init,
+               .fini = _nouveau_sw_context_fini,
+       },
+       .vblank = nv50_sw_vblsem_release,
+};
+
+/*******************************************************************************
+ * software engine/subdev functions
+ ******************************************************************************/
+
+int
+nv50_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+                  struct nouveau_oclass *oclass, void *data, u32 size,
+                  struct nouveau_object **pobject)
+{
+       struct nv50_sw_oclass *pclass = (void *)oclass;
+       struct nv50_sw_priv *priv;
+       int ret;
+
+       ret = nouveau_sw_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_engine(priv)->cclass = pclass->cclass;
+       nv_engine(priv)->sclass = pclass->sclass;
+       nv_subdev(priv)->intr = nv04_sw_intr;
+       return 0;
+}
+
+struct nouveau_oclass *
+nv50_sw_oclass = &(struct nv50_sw_oclass) {
+       .base.handle = NV_ENGINE(SW, 0x50),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv50_sw_ctor,
+               .dtor = _nouveau_sw_dtor,
+               .init = _nouveau_sw_init,
+               .fini = _nouveau_sw_fini,
+       },
+       .cclass = &nv50_sw_cclass.base,
+       .sclass =  nv50_sw_sclass,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h
new file mode 100644 (file)
index 0000000..618e41f
--- /dev/null
@@ -0,0 +1,46 @@
+#ifndef __NVKM_SW_NV50_H__
+#define __NVKM_SW_NV50_H__
+
+#include <engine/sw.h>
+
+struct nv50_sw_oclass {
+       struct nouveau_oclass base;
+       struct nouveau_oclass *cclass;
+       struct nouveau_oclass *sclass;
+};
+
+struct nv50_sw_priv {
+       struct nouveau_sw base;
+};
+
+int  nv50_sw_ctor(struct nouveau_object *, struct nouveau_object *,
+                       struct nouveau_oclass *, void *, u32,
+                       struct nouveau_object **);
+
+struct nv50_sw_cclass {
+       struct nouveau_oclass base;
+       int (*vblank)(struct nvkm_notify *);
+};
+
+struct nv50_sw_chan {
+       struct nouveau_sw_chan base;
+       struct {
+               struct nvkm_notify notify[4];
+               u32 channel;
+               u32 ctxdma;
+               u64 offset;
+               u32 value;
+       } vblank;
+};
+
+int  nv50_sw_context_ctor(struct nouveau_object *,
+                               struct nouveau_object *,
+                               struct nouveau_oclass *, void *, u32,
+                               struct nouveau_object **);
+void nv50_sw_context_dtor(struct nouveau_object *);
+
+int nv50_sw_mthd_vblsem_value(struct nouveau_object *, u32, void *, u32);
+int nv50_sw_mthd_vblsem_release(struct nouveau_object *, u32, void *, u32);
+int nv50_sw_mthd_flip(struct nouveau_object *, u32, void *, u32);
+
+#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvc0.c
new file mode 100644 (file)
index 0000000..dcb056e
--- /dev/null
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <core/os.h>
+#include <core/engctx.h>
+#include <core/event.h>
+
+#include <subdev/bar.h>
+
+#include <engine/sw.h>
+#include <engine/disp.h>
+
+#include "nv50.h"
+
+/*******************************************************************************
+ * software object classes
+ ******************************************************************************/
+
+static int
+nvc0_sw_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
+                                void *args, u32 size)
+{
+       struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
+       u64 data = *(u32 *)args;
+       if (mthd == 0x0400) {
+               chan->vblank.offset &= 0x00ffffffffULL;
+               chan->vblank.offset |= data << 32;
+       } else {
+               chan->vblank.offset &= 0xff00000000ULL;
+               chan->vblank.offset |= data;
+       }
+       return 0;
+}
+
+static int
+nvc0_sw_mthd_mp_control(struct nouveau_object *object, u32 mthd,
+                              void *args, u32 size)
+{
+       struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
+       struct nv50_sw_priv *priv = (void *)nv_object(chan)->engine;
+       u32 data = *(u32 *)args;
+
+       switch (mthd) {
+       case 0x600:
+               nv_wr32(priv, 0x419e00, data); /* MP.PM_UNK000 */
+               break;
+       case 0x644:
+               if (data & ~0x1ffffe)
+                       return -EINVAL;
+               nv_wr32(priv, 0x419e44, data); /* MP.TRAP_WARP_ERROR_EN */
+               break;
+       case 0x6ac:
+               nv_wr32(priv, 0x419eac, data); /* MP.PM_UNK0AC */
+               break;
+       default:
+               return -EINVAL;
+       }
+       return 0;
+}
+
+static struct nouveau_omthds
+nvc0_sw_omthds[] = {
+       { 0x0400, 0x0400, nvc0_sw_mthd_vblsem_offset },
+       { 0x0404, 0x0404, nvc0_sw_mthd_vblsem_offset },
+       { 0x0408, 0x0408, nv50_sw_mthd_vblsem_value },
+       { 0x040c, 0x040c, nv50_sw_mthd_vblsem_release },
+       { 0x0500, 0x0500, nv50_sw_mthd_flip },
+       { 0x0600, 0x0600, nvc0_sw_mthd_mp_control },
+       { 0x0644, 0x0644, nvc0_sw_mthd_mp_control },
+       { 0x06ac, 0x06ac, nvc0_sw_mthd_mp_control },
+       {}
+};
+
+static struct nouveau_oclass
+nvc0_sw_sclass[] = {
+       { 0x906e, &nouveau_object_ofuncs, nvc0_sw_omthds },
+       {}
+};
+
+/*******************************************************************************
+ * software context
+ ******************************************************************************/
+
+static int
+nvc0_sw_vblsem_release(struct nvkm_notify *notify)
+{
+       struct nv50_sw_chan *chan =
+               container_of(notify, typeof(*chan), vblank.notify[notify->index]);
+       struct nv50_sw_priv *priv = (void *)nv_object(chan)->engine;
+       struct nouveau_bar *bar = nouveau_bar(priv);
+
+       nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel);
+       bar->flush(bar);
+       nv_wr32(priv, 0x06000c, upper_32_bits(chan->vblank.offset));
+       nv_wr32(priv, 0x060010, lower_32_bits(chan->vblank.offset));
+       nv_wr32(priv, 0x060014, chan->vblank.value);
+
+       return NVKM_NOTIFY_DROP;
+}
+
+static struct nv50_sw_cclass
+nvc0_sw_cclass = {
+       .base.handle = NV_ENGCTX(SW, 0xc0),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv50_sw_context_ctor,
+               .dtor = nv50_sw_context_dtor,
+               .init = _nouveau_sw_context_init,
+               .fini = _nouveau_sw_context_fini,
+       },
+       .vblank = nvc0_sw_vblsem_release,
+};
+
+/*******************************************************************************
+ * software engine/subdev functions
+ ******************************************************************************/
+
+struct nouveau_oclass *
+nvc0_sw_oclass = &(struct nv50_sw_oclass) {
+       .base.handle = NV_ENGINE(SW, 0xc0),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv50_sw_ctor,
+               .dtor = _nouveau_sw_dtor,
+               .init = _nouveau_sw_init,
+               .fini = _nouveau_sw_fini,
+       },
+       .cclass = &nvc0_sw_cclass.base,
+       .sclass =  nvc0_sw_sclass,
+}.base;