Fix incorrect constant folds, fixing Stepanov after the SHR patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19429 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 224b969694d5d20a908f06ac11278952212b7d8e..644f807d1d812f102e2eca7d525b5eb2a9d14c20 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -354,10 +354,10 @@ SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, SDOperand N1,
       case ISD::SETUGT: return getConstant(C1 >  C2, MVT::i1);
       case ISD::SETULE: return getConstant(C1 <= C2, MVT::i1);
       case ISD::SETUGE: return getConstant(C1 >= C2, MVT::i1);
-      case ISD::SETLT:  return getConstant((int64_t)C1 < (int64_t)C2, MVT::i1);
-      case ISD::SETGT:  return getConstant((int64_t)C1 < (int64_t)C2, MVT::i1);
-      case ISD::SETLE:  return getConstant((int64_t)C1 < (int64_t)C2, MVT::i1);
-      case ISD::SETGE:  return getConstant((int64_t)C1 < (int64_t)C2, MVT::i1);
+      case ISD::SETLT:  return getConstant((int64_t)C1 <  (int64_t)C2, MVT::i1);
+      case ISD::SETGT:  return getConstant((int64_t)C1 >  (int64_t)C2, MVT::i1);
+      case ISD::SETLE:  return getConstant((int64_t)C1 <= (int64_t)C2, MVT::i1);
+      case ISD::SETGE:  return getConstant((int64_t)C1 >= (int64_t)C2, MVT::i1);
       }
     } else {
       // Ensure that the constant occurs on the RHS.