(isExtended() && isVector() && getSizeInBits()==128));
}
+ /// isByteSized - Return true if the bit size is a multiple of 8.
+ inline bool isByteSized() const {
+ return (getSizeInBits() & 7) == 0;
+ }
/// bitsGT - Return true if this has more bits than VT.
inline bool bitsGT(MVT VT) const {
// Loading a non-byte sized integer is only valid if the extra bits
// in memory that complete the byte are zero, which is not known here.
// TODO: remove isSimple check when apint codegen support lands.
- EVT.isSimple() && EVT.getSizeInBits() == EVT.getStoreSizeInBits() &&
+ EVT.isSimple() && EVT.isByteSized() &&
(!AfterLegalize || TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) {
MVT PtrType = N0.getOperand(1).getValueType();
// For big endian targets, we need to add an offset to the pointer to
// Do not allow folding to a non-byte-sized integer here. These only
// load correctly if the extra bits in memory that complete the byte
// are zero, which is not known here.
- VT.getSizeInBits() == VT.getStoreSizeInBits()) {
+ VT.isByteSized()) {
assert(N0.getValueType().getSizeInBits() > EVTBits &&
"Cannot truncate to larger type!");
LoadSDNode *LN0 = cast<LoadSDNode>(N0);
MVT VT = N->getValueType(0);
// Zero extend things like i1, sign extend everything else. It shouldn't
// matter in theory which one we pick, but this tends to give better code?
- unsigned Opc = VT != MVT::i1 ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
+ unsigned Opc = VT.isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
SDOperand Result = DAG.getNode(Opc, TLI.getTypeToTransformTo(VT),
SDOperand(N, 0));
assert(isa<ConstantSDNode>(Result) && "Didn't constant fold ext?");
NumRegistersForVT[MVT::isVoid] = 0;
// Find the largest integer register class.
- unsigned LargestIntReg = MVT::i128;
+ unsigned LargestIntReg = MVT::LAST_INTEGER_VALUETYPE;
for (; RegClassForVT[LargestIntReg] == 0; --LargestIntReg)
assert(LargestIntReg != MVT::i1 && "No integer registers defined!");