add SDNPMayLoad to the 'load' sdnode definition. This is enough to get all the x86

instructions (with patterns) that load memory marked, for example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45818 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td
index 6a7da0c6911fb30c71d9722931a8d688f94bcb1f..d80909c7fd6a6496707f3808980f6d61a240d593 100644 (file)
--- a/lib/Target/TargetSelectionDAG.td
+++ b/lib/Target/TargetSelectionDAG.td
@@ -190,6 +190,7 @@ def SDNPOutFlag     : SDNodeProperty;   // Write a flag result
 def SDNPInFlag      : SDNodeProperty;   // Read a flag operand
 def SDNPOptInFlag   : SDNodeProperty;   // Optionally read a flag operand
 def SDNPMayStore    : SDNodeProperty;   // May write to memory, sets 'mayStore'.
+def SDNPMayLoad     : SDNodeProperty;   // May read memory, sets 'mayLoad'.
 
 //===----------------------------------------------------------------------===//
 // Selection DAG Node definitions.
@@ -313,7 +314,8 @@ def ret        : SDNode<"ISD::RET"        , SDTRet,    [SDNPHasChain]>;
 
 // Do not use ld, st directly. Use load, extload, sextload, zextload, store,
 // and truncst (see below).
-def ld         : SDNode<"ISD::LOAD"       , SDTLoad,  [SDNPHasChain]>;
+def ld         : SDNode<"ISD::LOAD"       , SDTLoad,
+                        [SDNPHasChain, SDNPMayLoad]>;
 def st         : SDNode<"ISD::STORE"      , SDTStore,
                         [SDNPHasChain, SDNPMayStore]>;
 def ist        : SDNode<"ISD::STORE"      , SDTIStore,