drm/rockchip: dsi: partial revert commit 47aef8
authorWeiYong Bi <bivvy.bi@rock-chips.com>
Mon, 7 Aug 2017 09:55:06 +0000 (17:55 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Tue, 8 Aug 2017 07:31:13 +0000 (15:31 +0800)
fix anomaly display issue for rk3368 caused by commit 47aef8

Fixes 47aef8 (drm/rockchip: dw-mipi-dsi: organize dw_mipi_dsi_set_mode function)

Change-Id: Ida274c65898b13468a2f984555efdf67cf32aab7
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
drivers/gpu/drm/rockchip/dw-mipi-dsi.c

index ffe4f0a52323bea70768ee503e88f7fee298301b..0951a88c932515d89960367142d503169d9aa27e 100644 (file)
@@ -832,10 +832,14 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
                                 enum dw_mipi_dsi_mode mode)
 {
-       if (mode == DSI_COMMAND_MODE)
+       if (mode == DSI_COMMAND_MODE) {
                dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
-       else
+       } else {
+               dsi_write(dsi, DSI_PWR_UP, RESET);
+               dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
                dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
+               dsi_write(dsi, DSI_PWR_UP, POWERUP);
+       }
 }
 
 static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
@@ -1161,7 +1165,6 @@ static void rockchip_dsi_init(struct dw_mipi_dsi *dsi)
 
 static void rockchip_dsi_enable(struct dw_mipi_dsi *dsi)
 {
-       dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
        dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
        clk_disable_unprepare(dsi->dphy.ref_clk);
        clk_disable_unprepare(dsi->pclk);