oprofile/x86: fix msr access to reserved counters

commit cfc9c0b450176a077205ef39092f0dc1a04e020a upstream.

During switching virtual counters there is access to perfctr msrs. If
the counter is not available this fails due to an invalid
address. This patch fixes this.

Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 5a973ae60782d075f25120a43026fd732de90e7d..1ed963d2e9b6730c99517cbc1a44a0eaf3e47e8c 100644 (file)
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -85,7 +85,7 @@ static void op_mux_switch_ctrl(struct op_x86_model_spec const *model,
        /* enable active counters */
        for (i = 0; i < NUM_COUNTERS; ++i) {
                int virt = op_x86_phys_to_virt(i);
-               if (!counter_config[virt].enabled)
+               if (!reset_value[virt])
                        continue;
                rdmsrl(msrs->controls[i].addr, val);
                val &= model->reserved;
@@ -121,7 +121,8 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
 
        /* setup reset_value */
        for (i = 0; i < NUM_VIRT_COUNTERS; ++i) {
-               if (counter_config[i].enabled)
+               if (counter_config[i].enabled
+                   && msrs->counters[op_x86_virt_to_phys(i)].addr)
                        reset_value[i] = counter_config[i].count;
                else
                        reset_value[i] = 0;
@@ -146,9 +147,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
        /* enable active counters */
        for (i = 0; i < NUM_COUNTERS; ++i) {
                int virt = op_x86_phys_to_virt(i);
-               if (!counter_config[virt].enabled)
-                       continue;
-               if (!msrs->counters[i].addr)
+               if (!reset_value[virt])
                        continue;
 
                /* setup counter registers */