unsigned ResultReg = createResultReg(&X86::GR8RegClass);
unsigned SetCCOpc;
-
+ bool SwapArgs; // false -> compare Op0, Op1. true -> compare Op1, Op0.
switch (CI->getPredicate()) {
case CmpInst::FCMP_OEQ: {
unsigned EReg = createResultReg(&X86::GR8RegClass);
UpdateValueMap(I, ResultReg);
return true;
}
- case CmpInst::FCMP_OGT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETAr;
- break;
- case CmpInst::FCMP_OGE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETAEr;
- break;
- case CmpInst::FCMP_OLT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op1Reg).addReg(Op0Reg);
- SetCCOpc = X86::SETAr;
- break;
- case CmpInst::FCMP_OLE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op1Reg).addReg(Op0Reg);
- SetCCOpc = X86::SETAEr;
- break;
- case CmpInst::FCMP_ONE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETNEr;
- break;
- case CmpInst::FCMP_ORD:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETNPr;
- break;
- case CmpInst::FCMP_UNO:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETPr;
- break;
- case CmpInst::FCMP_UEQ:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETEr;
- break;
- case CmpInst::FCMP_UGT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op1Reg).addReg(Op0Reg);
- SetCCOpc = X86::SETBr;
- break;
- case CmpInst::FCMP_UGE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op1Reg).addReg(Op0Reg);
- SetCCOpc = X86::SETBEr;
- break;
- case CmpInst::FCMP_ULT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETBr;
- break;
- case CmpInst::FCMP_ULE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETBEr;
- break;
- case CmpInst::ICMP_EQ:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETEr;
- break;
- case CmpInst::ICMP_NE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETNEr;
- break;
- case CmpInst::ICMP_UGT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETAr;
- break;
- case CmpInst::ICMP_UGE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETAEr;
- break;
- case CmpInst::ICMP_ULT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETBr;
- break;
- case CmpInst::ICMP_ULE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETBEr;
- break;
- case CmpInst::ICMP_SGT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETGr;
- break;
- case CmpInst::ICMP_SGE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETGEr;
- break;
- case CmpInst::ICMP_SLT:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETLr;
- break;
- case CmpInst::ICMP_SLE:
- BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
- SetCCOpc = X86::SETLEr;
- break;
+ case CmpInst::FCMP_OGT: SwapArgs = false; SetCCOpc = X86::SETAr; break;
+ case CmpInst::FCMP_OGE: SwapArgs = false; SetCCOpc = X86::SETAEr; break;
+ case CmpInst::FCMP_OLT: SwapArgs = true; SetCCOpc = X86::SETAr; break;
+ case CmpInst::FCMP_OLE: SwapArgs = true; SetCCOpc = X86::SETAEr; break;
+ case CmpInst::FCMP_ONE: SwapArgs = false; SetCCOpc = X86::SETNEr; break;
+ case CmpInst::FCMP_ORD: SwapArgs = false; SetCCOpc = X86::SETNPr; break;
+ case CmpInst::FCMP_UNO: SwapArgs = false; SetCCOpc = X86::SETPr; break;
+ case CmpInst::FCMP_UEQ: SwapArgs = false; SetCCOpc = X86::SETEr; break;
+ case CmpInst::FCMP_UGT: SwapArgs = true; SetCCOpc = X86::SETBr; break;
+ case CmpInst::FCMP_UGE: SwapArgs = true; SetCCOpc = X86::SETBEr; break;
+ case CmpInst::FCMP_ULT: SwapArgs = false; SetCCOpc = X86::SETBr; break;
+ case CmpInst::FCMP_ULE: SwapArgs = false; SetCCOpc = X86::SETBEr; break;
+
+ case CmpInst::ICMP_EQ: SwapArgs = false; SetCCOpc = X86::SETEr; break;
+ case CmpInst::ICMP_NE: SwapArgs = false; SetCCOpc = X86::SETNEr; break;
+ case CmpInst::ICMP_UGT: SwapArgs = false; SetCCOpc = X86::SETAr; break;
+ case CmpInst::ICMP_UGE: SwapArgs = false; SetCCOpc = X86::SETAEr; break;
+ case CmpInst::ICMP_ULT: SwapArgs = false; SetCCOpc = X86::SETBr; break;
+ case CmpInst::ICMP_ULE: SwapArgs = false; SetCCOpc = X86::SETBEr; break;
+ case CmpInst::ICMP_SGT: SwapArgs = false; SetCCOpc = X86::SETGr; break;
+ case CmpInst::ICMP_SGE: SwapArgs = false; SetCCOpc = X86::SETGEr; break;
+ case CmpInst::ICMP_SLT: SwapArgs = false; SetCCOpc = X86::SETLr; break;
+ case CmpInst::ICMP_SLE: SwapArgs = false; SetCCOpc = X86::SETLEr; break;
default:
return false;
}
- if (SetCCOpc)
- BuildMI(MBB, TII.get(SetCCOpc), ResultReg);
-
+ if (SwapArgs)
+ BuildMI(MBB, TII.get(Opc)).addReg(Op1Reg).addReg(Op0Reg);
+ else
+ BuildMI(MBB, TII.get(Opc)).addReg(Op0Reg).addReg(Op1Reg);
+
+ BuildMI(MBB, TII.get(SetCCOpc), ResultReg);
UpdateValueMap(I, ResultReg);
return true;
}