rk2928:a720:support i2c commucintion in sram and reduce arm and logic voltage when...
author张晴 <zhangqing@rock-chips.com>
Fri, 14 Sep 2012 02:50:01 +0000 (10:50 +0800)
committer张晴 <zhangqing@rock-chips.com>
Fri, 14 Sep 2012 02:50:01 +0000 (10:50 +0800)
arch/arm/mach-rk2928/Makefile
arch/arm/mach-rk2928/board-rk2928-a720.c
arch/arm/mach-rk2928/include/mach/io.h [changed mode: 0644->0755]
arch/arm/mach-rk2928/io.c [changed mode: 0644->0755]
arch/arm/mach-rk2928/pm.c [changed mode: 0644->0755]

index 341998a8083623200c7c15eb8dc41bb61f526e86..d88f55281b6ac5b4436b3cac13f6248be4597e23 100755 (executable)
@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_FREQ) += cpufreq.o
 obj-$(CONFIG_DVFS) += dvfs.o
 obj-$(CONFIG_PM) += pm.o
 CFLAGS_pm.o += -Os -mthumb
+obj-$(CONFIG_RK30_I2C_INSRAM) += i2c_sram.o
 
 obj-$(CONFIG_MACH_RK2928_FPGA) += board-rk2928-fpga.o
 obj-$(CONFIG_MACH_RK2928_SDK) += board-rk2928-sdk.o
index 4399b569b8484776b431ebcb49ae0ec760cd24b1..c5f0284fab63d95a9b57f221e579e442a3b82309 100755 (executable)
@@ -537,6 +537,54 @@ static struct i2c_board_info __initdata i2c0_info[] = {
 
 };
 #endif
+
+int __sramdata gpio0d4_iomux,gpio0d4_do,gpio0d4_dir;
+
+#define gpio_readl(offset)     readl_relaxed(RK2928_GPIO0_BASE + offset)
+#define gpio_writel(v, offset) do { writel_relaxed(v, RK2928_GPIO0_BASE + offset); dsb(); } while (0)
+
+void __sramfunc rk30_pwm_logic_suspend_voltage(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+
+//     int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en;
+       sram_udelay(10000);
+       gpio0d4_iomux = readl_relaxed(GRF_GPIO0D_IOMUX);
+       gpio0d4_do = gpio_readl(GPIO_SWPORTA_DR);
+       gpio0d4_dir = gpio_readl(GPIO_SWPORTA_DDR);
+
+       writel_relaxed((gpio0d4_iomux |(1<<24)) & (~(1<<8)), GRF_GPIO0D_IOMUX);
+       gpio_writel(gpio0d4_dir |(1<<28), GPIO_SWPORTA_DDR);
+       gpio_writel(gpio0d4_do |(1<<28), GPIO_SWPORTA_DR);
+       
+#endif 
+}
+void __sramfunc rk30_pwm_logic_resume_voltage(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+       writel_relaxed((1<<24)|gpio0d4_iomux, GRF_GPIO0D_IOMUX);
+       gpio_writel(gpio0d4_dir, GPIO_SWPORTA_DDR);
+       gpio_writel(gpio0d4_do, GPIO_SWPORTA_DR);
+       sram_udelay(10000);
+
+#endif
+
+}
+extern void pwm_suspend_voltage(void);
+extern void pwm_resume_voltage(void);
+void  rk30_pwm_suspend_voltage_set(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+       pwm_suspend_voltage();
+#endif
+}
+void  rk30_pwm_resume_voltage_set(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+       pwm_resume_voltage();
+#endif
+}
+
 #ifdef CONFIG_I2C1_RK30
 static struct i2c_board_info __initdata i2c1_info[] = {
 #if defined (CONFIG_GS_MMA7660)
old mode 100644 (file)
new mode 100755 (executable)
index 6f20120..9924a0c
 #define RK2928_I2C1_PHYS        0x20054000
 #define RK2928_I2C1_SIZE        SZ_4K
 #define RK2928_RKI2C1_PHYS      0x20056000
+#define RK2928_RKI2C1_BASE       RK2928_IO_TO_VIRT1(RK2928_RKI2C1_PHYS)
 #define RK2928_RKI2C1_SIZE      SZ_4K
 #define RK2928_I2C2_PHYS        0x20058000
 #define RK2928_I2C2_SIZE        SZ_4K
 #define RK2928_I2C0_PHYS        0x20070000
 #define RK2928_I2C0_SIZE        SZ_4K
 #define RK2928_RKI2C0_PHYS      0x20072000
+#define RK2928_RKI2C0_BASE       RK2928_IO_TO_VIRT1(RK2928_RKI2C0_PHYS)
 #define RK2928_RKI2C0_SIZE      SZ_4K
 #define RK2928_SPI_PHYS         0x20074000
 #define RK2928_SPI_SIZE         SZ_16K
old mode 100644 (file)
new mode 100755 (executable)
index 53e6078..3ce4bb9
@@ -48,6 +48,8 @@ static struct map_desc rk2928_io_desc[] __initdata = {
        RK2928_DEVICE(PWM),
        RK2928_DEVICE(DDR_PCTL),
        RK2928_DEVICE(DDR_PHY),
+       RK2928_DEVICE(RKI2C0),
+       RK2928_DEVICE(RKI2C1),
        {
                .virtual = (unsigned long) RK2928_IMEM_NONCACHED,
                .pfn = __phys_to_pfn(RK2928_IMEM_PHYS),
old mode 100644 (file)
new mode 100755 (executable)
index 294034a..7600218
@@ -240,7 +240,11 @@ static noinline void interface_ctr_reg_pread(void)
        readl_relaxed(RK2928_GPIO1_BASE);
        readl_relaxed(RK2928_GPIO2_BASE);
        readl_relaxed(RK2928_GPIO3_BASE);
-//     readl_relaxed(RK2928_I2C1_BASE);
+       #if defined (CONFIG_MACH_RK2928_SDK)
+       readl_relaxed(RK2928_RKI2C1_BASE);
+       #else
+       readl_relaxed(RK2928_RKI2C0_BASE);
+       #endif
 }
 
 __weak void board_gpio_suspend(void) {}
@@ -397,6 +401,7 @@ static int rk2928_pm_enter(suspend_state_t state)
                          | (1 << CLK_GATE_PCLK_GPIO2 % 16)
                          | (1 << CLK_GATE_PCLK_GPIO3 % 16)
                          , clkgt_regs[8], CRU_CLKGATES_CON(8), 0xffff);
+       cru_writel( ((1 << CLK_GATE_PCLK_GPIO0 % 16)<<16),  CRU_CLKGATES_CON(8));
        gate_save_soc_clk(0
                          | (1 << CLK_GATE_CLK_L2C % 16)
                          | (1 << CLK_GATE_HCLK_PERI_ARBI % 16)