unsigned char *p = buf;\r
for(i=0;i<len;i++)\r
{\r
- printk("%s:buf[%d]=0x%x\n",__FUNCTION__,i,*p);\r
+ DBG("%s:buf[%d]=0x%x\n",__FUNCTION__,i,*p);\r
p++;\r
}\r
#endif\r
ret = spi_write(port->spi, tx_buf, count+3);\r
if(ret)\r
{\r
- printk("%s:spi_write err! i=%d\n",__FUNCTION__,i);\r
+ DBG("%s:spi_write err! i=%d\n",__FUNCTION__,i);\r
return ret;\r
}\r
}\r
stat = spi_write_then_read(port->spi, tx_buf, sizeof(tx_buf), buf + i*MAX_SPI_LEN, count); \r
if(stat)\r
{\r
- printk("%s:spi_write_then_read is error!,err=%d\n\n",__FUNCTION__,stat);\r
+ DBG("%s:spi_write_then_read is error!,err=%d\n\n",__FUNCTION__,stat);\r
return -1;\r
}\r
\r
ret = spi_write(port->spi, tx_buf, sizeof(tx_buf));\r
if(ret)\r
{\r
- printk("%s:spi_write err!\n",__FUNCTION__);\r
+ DBG("%s:spi_write err!\n",__FUNCTION__);\r
return -1;\r
}\r
\r
ret = spi_write_then_read(port->spi, tx_buf, sizeof(tx_buf), rx_buf, sizeof(rx_buf));\r
if(ret)\r
{\r
- printk("%s:spi_write_then_read err!\n",__FUNCTION__);\r
+ DBG("%s:spi_write_then_read err!\n",__FUNCTION__);\r
return -1;\r
}\r
\r
int gNumCount = 0;\r
unsigned char buf_dpram[SPI_DPRAM_BPWRITE_SIZE<<1];\r
\r
+int gRecCount = 0; \r
\r
//really is spi_dpram_irq_work_handler after dpram's pin is exchanged \r
static void spi_dpram_irq_work_handler(struct work_struct *work)\r
unsigned int ptr,len;\r
int i;\r
char temp,*p;\r
- printk("Enter::%s,mbox=%d\n",__FUNCTION__,mbox);\r
+ DBG("Enter::%s,mbox=%d\n",__FUNCTION__,mbox);\r
//gNumRecInt = mbox & 0x1fff;\r
//if(gNumRecInt - gNumLastRecInt !=1)\r
//if(++gNumLastRecInt > (1<<12))\r
len = ptr; \r
port->dpram.read_dpram(&port->dpram, SPI_DPRAM_BPWRITE_START, port->dpram.prx, len);\r
port->dpram.rec_len += ptr; \r
- printk("%s:ram0:ptr=%d,len=%d\n",__FUNCTION__,ptr,len); \r
+ gRecCount = port->dpram.rec_len; \r
+ DBG("%s:ram0:ptr=%d,len=%d\n",__FUNCTION__,ptr,len); \r
//send ack\r
//if(++gNumSendAck > (1<<12))\r
//gNumSendAck = 0;\r
*(p+(i<<1))= *(p+(i<<1)+1);\r
*(p+(i<<1)+1) = temp;\r
}\r
-\r
- for(i=0;i<ptr;i++)\r
- printk("%s:prx[%d]=0x%x\n",__FUNCTION__,i,*p++); \r
+ \r
+ p = port->dpram.prx;\r
+ for(i=0;i<ptr;i++)\r
+ printk("%s:prx[%d]=0x%x\n",__FUNCTION__,i,*p++);\r
\r
//wake up ap to read data\r
wake_up_interruptible(&port->dpram.recq);\r
//allow bp write ram0 again\r
port->dpram.write_ack(&port->dpram, (MAILBOX_APSEND_ACK | MAILBOX_RAM0));\r
\r
- //printk("%s:r_irq=0x%x,s_ack=0x%x\n",__FUNCTION__,mbox, (MAILBOX_APSEND_ACK | MAILBOX_RAM0 | gNumSendAck));\r
+ //DBG("%s:r_irq=0x%x,s_ack=0x%x\n",__FUNCTION__,mbox, (MAILBOX_APSEND_ACK | MAILBOX_RAM0 | gNumSendAck));\r
}\r
else if((mbox&MAILBOX_RAM3) == MAILBOX_RAM2)\r
{\r
len = ptr; \r
port->dpram.read_dpram(&port->dpram, SPI_DPRAM_LOG_BPWRITE_START, port->dpram.prx, len);\r
port->dpram.rec_len += ptr; \r
- printk("%s:ram2:ptr=%d,len=%d\n",__FUNCTION__,ptr,len); \r
+ DBG("%s:ram2:ptr=%d,len=%d\n",__FUNCTION__,ptr,len); \r
//if(++gNumSendAck > (1<<12))\r
//gNumSendAck = 0;\r
//port->dpram.write_ack(&port->dpram, (MAILBOX_APSEND_ACK | MAILBOX_RAM2 | gNumSendAck));\r
//allow bp write ram0 again\r
port->dpram.write_ack(&port->dpram, (MAILBOX_APSEND_ACK | MAILBOX_RAM2));\r
\r
- //printk("%s:r_irq=0x%x,s_ack=0x%x\n",__FUNCTION__, mbox, (MAILBOX_APSEND_ACK | MAILBOX_RAM2 | gNumSendAck));\r
- }\r
+ //DBG("%s:r_irq=0x%x,s_ack=0x%x\n",__FUNCTION__, mbox, (MAILBOX_APSEND_ACK | MAILBOX_RAM2 | gNumSendAck));\r
+ } \r
\r
}\r
\r
int i;\r
struct spi_fpga_port *port =\r
container_of(work, struct spi_fpga_port, dpram.spi_dpram_work);\r
- printk("*************test spi_dpram now***************\n");\r
+ DBG("*************test spi_dpram now***************\n");\r
\r
for(i=0;i<SPI_DPRAM_BPWRITE_SIZE;i++)\r
{\r
{\r
ret = (*(port->dpram.prx+2*i)<<8) | (*(port->dpram.prx+2*i+1));\r
if(ret != 0xa000+i)\r
- printk("prx[%d]=0x%x ram[%d]=0x%x\n",i,ret&0xffff,i,0xa000+i);\r
+ DBG("prx[%d]=0x%x ram[%d]=0x%x\n",i,ret&0xffff,i,0xa000+i);\r
}\r
\r
#elif(SEL_RAM == SEL_RAM1) \r
{\r
ret = (*(port->dpram.prx+2*i)<<8) | (*(port->dpram.prx+2*i+1));\r
if(ret != 0xc000+i)\r
- printk("prx[%d]=0x%x ram[%d]=0x%x\n",i,ret&0xffff,i,0xc000+i);\r
+ DBG("prx[%d]=0x%x ram[%d]=0x%x\n",i,ret&0xffff,i,0xc000+i);\r
}\r
\r
#elif(SEL_RAM == SEL_RAM3) \r
{\r
struct spi_fpga_port *port = pFpgaPort;\r
\r
- printk("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port);\r
+ DBG("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port);\r
filp->private_data = port;\r
port->dpram.rec_len = 0;\r
port->dpram.send_len = 0;\r
static int dpr_close(struct inode *inode, struct file *filp)\r
{\r
//struct spi_fpga_port *port = pFpgaPort;\r
- printk("%s:line=%d\n",__FUNCTION__,__LINE__);\r
+ DBG("%s:line=%d\n",__FUNCTION__,__LINE__);\r
filp->private_data = NULL;\r
return 0;\r
}\r
-\r
-int gRecCount = 0;\r
+ \r
static ssize_t dpr_read (struct file *filp, char __user *buffer, size_t count, loff_t *ppos)\r
{\r
- int ret=0; \r
+ int ret;\r
struct spi_fpga_port *port = filp->private_data;\r
\r
- down_interruptible(&port->dpram.rec_sem);\r
- \r
- printk("%s, port=0x%x , count=%d, port->dpram.rec_len=%d \n",__FUNCTION__, (int)port, count, port->dpram.rec_len); \r
+ ret = down_interruptible(&port->dpram.rec_sem);\r
+ //DBG("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port); \r
+ DBG("%s, port=0x%x , count=%d, port->dpram.rec_len=%d \n",__FUNCTION__, (int)port, count, port->dpram.rec_len); \r
\r
//printk("%s:CURRENT_TASK=0x%x\n",__FUNCTION__,current); \r
while(port->dpram.rec_len == 0)\r
\r
if(wait_event_interruptible(port->dpram.recq, (port->dpram.rec_len != 0)))\r
{ \r
- printk("%s:NO data in dpram!\n",__FUNCTION__);\r
+ DBG("%s:NO data in dpram!\n",__FUNCTION__);\r
return -ERESTARTSYS; \r
}\r
\r
- gRecCount = port->dpram.rec_len;\r
+ //gRecCount = port->dpram.rec_len;\r
}\r
\r
/*read data from buffer*/\r
- if(port->dpram.rec_len >=count){ \r
- if(copy_to_user((char*)buffer, (char *)(port->dpram.prx + gRecCount - port->dpram.rec_len), count))\r
- {\r
- printk("%s:copy_to_user err!\n",__FUNCTION__);\r
- return -EFAULT;\r
- }\r
- ret = count; \r
- }else{ \r
- if(copy_to_user((char*)buffer, (char *)(port->dpram.prx + gRecCount - port->dpram.rec_len), port->dpram.rec_len))\r
- {\r
- printk("%s:copy_to_user err!\n",__FUNCTION__);\r
- return -EFAULT;\r
- }\r
- ret = port->dpram.rec_len; \r
- }\r
- \r
- #if 1\r
- int i;\r
+ if(copy_to_user((char*)buffer, (char *)(port->dpram.prx + gRecCount - port->dpram.rec_len), count))\r
+ {\r
+ DBG("%s:copy_to_user err!\n",__FUNCTION__);\r
+ return -EFAULT;\r
+ }\r
+ \r
+ #if 1 \r
+ int i,len;\r
char *p = buffer;\r
- for(i=0;i<ret;i++)\r
- {\r
- printk("dpr_read, prx[%d]=0x%x\n", i, *p++); \r
+ len = port->dpram.rec_len;\r
+ //for(i=0;i<len;i++)\r
+ //{\r
+ if(count==1){\r
+ DBG("%s:prx[%d]=0x%x, src = %x \n",__FUNCTION__,i,*p, *((char *)(port->dpram.prx + gRecCount - port->dpram.rec_len)));\r
+ }else{\r
+ printk("count = %d, $$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$\n", count); \r
}\r
#endif\r
\r
- if(port->dpram.rec_len >= count){ \r
- port->dpram.rec_len -= count; \r
- }else{ \r
- port->dpram.rec_len = 0; \r
- }\r
- \r
- if(port->dpram.rec_len == 0){ \r
- printk("port->dpram.rec_len to 0 \n"); \r
- mutex_unlock(&port->dpram.rec_lock); \r
- } \r
- \r
+ port->dpram.rec_len -= count;\r
+ if(port->dpram.rec_len == 0)\r
+ mutex_unlock(&port->dpram.rec_lock); \r
+\r
up(&port->dpram.rec_sem);\r
\r
- return ret;\r
+ return count;\r
}\r
\r
\r
struct spi_fpga_port *port = filp->private_data;\r
int mod,num;\r
char i,*p,temp;\r
- printk("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port); \r
+ printk("%s:line=%d,port=0x%x, count=%d \n",__FUNCTION__,__LINE__,(int)port, count); \r
\r
while(port->dpram.apwrite_en == FALSE)\r
{\r
- if(filp->f_flags & O_NONBLOCK)\r
- return -EAGAIN;\r
- if(wait_event_interruptible(port->dpram.sendq, (port->dpram.apwrite_en == TRUE)))\r
- return -ERESTARTSYS;\r
+ \r
+ //if(filp->f_flags & O_NONBLOCK)\r
+ // return -EAGAIN;\r
+ if(wait_event_interruptible(port->dpram.sendq, (port->dpram.apwrite_en == TRUE))){ \r
+ printk("port->dpram.apwrite_en == FALSE"); \r
+ return -ERESTARTSYS; \r
+ }\r
+ printk("%s, wake up \n", __FUNCTION__); \r
}\r
\r
if(count > port->dpram.max_send_len)\r
p=port->dpram.ptx;\r
for(i=0;i<num;i++)\r
{\r
- printk("%s:ptx[%d]=0x%x\n",__FUNCTION__,i,*p);\r
+ /*DBG*/printk("%s:ptx[%d]=0x%x\n",__FUNCTION__,i,*p);\r
p++;\r
}\r
#endif\r
if(++gNumSendInt > (1<<12))\r
gNumSendInt = 0;\r
\r
+ if(gpio_get_value(PIN_BPSEND_ACK)==0){ \r
+ printk("BP_READY is LOW, wake up BP \n"); \r
+ gpio_direction_output(PIN_APSEND_ACK,GPIO_LOW);\r
+ msleep(50); \r
+ gpio_direction_output(PIN_APSEND_ACK,GPIO_HIGH);\r
+ msleep(50); \r
+ } \r
+ \r
+ while(gpio_get_value(PIN_BPSEND_ACK)==0){ \r
+ printk("BP_READY is LOW, wait 100ms !!!!!!!!!!!!\n"); \r
+ msleep(100); \r
+ } \r
+\r
//send irq to bp after ap write data to dpram\r
- port->dpram.write_irq(&port->dpram, MAILBOX_APSEND_IRQ | MAILBOX_RAM1); \r
+ port->dpram.write_irq(&port->dpram, MAILBOX_APSEND_IRQ | MAILBOX_RAM1 | gNumSendInt); \r
\r
return count;\r
\r
unsigned int mask = 0;\r
struct spi_fpga_port *port;\r
port = filp->private_data;\r
- printk("%s:line=%d\n",__FUNCTION__,__LINE__);\r
+ DBG("%s:line=%d\n",__FUNCTION__,__LINE__);\r
\r
#if 1\r
poll_wait(filp, &port->dpram.recq, wait);\r
port->dpram.prx = (char *)kzalloc(sizeof(char)*((SPI_DPRAM_BPWRITE_SIZE<<1)+6), GFP_KERNEL);\r
if(port->dpram.prx == NULL)\r
{\r
- printk("port->dpram.prx kzalloc err!!!\n");\r
+ DBG("port->dpram.prx kzalloc err!!!\n");\r
return -ENOMEM;\r
}\r
\r
port->dpram.ptx = (char *)kzalloc(sizeof(char)*((SPI_DPRAM_APWRITE_SIZE<<1)+6), GFP_KERNEL);\r
if(port->dpram.ptx == NULL)\r
{\r
- printk("port->dpram.ptx kzalloc err!!!\n");\r
+ DBG("port->dpram.ptx kzalloc err!!!\n");\r
return -ENOMEM;\r
}\r
DBG("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port);\r
sprintf(b, "spi_dpram_irq_workqueue");\r
port->dpram.spi_dpram_irq_workqueue = create_freezeable_workqueue(b);\r
if (!port->dpram.spi_dpram_irq_workqueue) {\r
- printk("cannot create workqueue\n");\r
+ DBG("cannot create workqueue\n");\r
return -EBUSY;\r
} \r
INIT_WORK(&port->dpram.spi_dpram_irq_work, spi_dpram_irq_work_handler);\r
sprintf(b, "spi_dpram_workqueue");\r
port->dpram.spi_dpram_workqueue = create_freezeable_workqueue(b);\r
if (!port->dpram.spi_dpram_workqueue) {\r
- printk("cannot create workqueue\n");\r
+ DBG("cannot create workqueue\n");\r
return -EBUSY;\r
}\r
INIT_WORK(&port->dpram.spi_dpram_work, spi_dpram_work_handler);\r
ret = misc_register(&port->dpram.miscdev);\r
if(ret)\r
{\r
- printk("%s:misc_register err!!!\n",__FUNCTION__);\r
+ DBG("%s:misc_register err!!!\n",__FUNCTION__);\r
goto err0;\r
}\r
\r
\r
ret = gpio_request(SPI_DPRAM_INT_PIN, NULL);\r
if (ret) {\r
- printk("%s:failed to request dpram irq gpio\n",__FUNCTION__);\r
+ DBG("%s:failed to request dpram irq gpio\n",__FUNCTION__);\r
goto err1;\r
}\r
\r
ret = request_irq(gpio_to_irq(SPI_DPRAM_INT_PIN),spi_dpram_irq,IRQF_TRIGGER_FALLING,NULL,port);\r
if(ret)\r
{\r
- printk("%s:unable to request dpram irq_gpio irq\n",__FUNCTION__);\r
+ DBG("%s:unable to request dpram irq_gpio irq\n",__FUNCTION__);\r
goto err2;\r
} \r
DBG("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port);\r
+\r
+ \r
+ /*disable speaker */\r
+ gpio_request(RK2818_PIN_PF7, "DPRAM"); \r
+ rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_GPIO1_A3B7);\r
+ gpio_direction_output(RK2818_PIN_PF7,GPIO_LOW);\r
+ msleep(100); \r
+ gpio_direction_output(RK2818_PIN_PF7,GPIO_HIGH);\r
+ msleep(100); \r
\r
return 0;\r
\r