arm: dts: zynq: Move crystal freq. to board level

The fact that all supported boards use the same 33MHz crystal is a
co-incidence. The Zynq PS support a range of crystal freqs so the
hardcoded setting should be removed from the dtsi. Re-implement it
on the board level.

This prepares support for Zynq boards with different crystal
frequencies (e.g. the Digilent ZYBO).

Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 24036c440440c0f13cbcbc54ac0c034dcc5653cc..f8e4a28adfc0fbd4a51400dec2860865b3a9e665 100644 (file)
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -244,7 +244,6 @@
                        clkc: clkc@100 {
                                #clock-cells = <1>;
                                compatible = "xlnx,ps7-clkc";
-                               ps-clk-frequency = <33333333>;
                                fclk-enable = <0>;
                                clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
                                                "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",

diff --git a/arch/arm/boot/dts/zynq-parallella.dts b/arch/arm/boot/dts/zynq-parallella.dts
index e1f51ca127fe835664f0609b19a1ef428de62ca8..538a40a32eb444923f9cbf312e0fd56929fc66bb 100644 (file)
--- a/arch/arm/boot/dts/zynq-parallella.dts
+++ b/arch/arm/boot/dts/zynq-parallella.dts
@@ -34,6 +34,10 @@
        };
 };
 
+&clkc {
+       ps-clk-frequency = <33333333>;
+};
+
 &gem0 {
        status = "okay";
        phy-mode = "rgmii-id";

diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 94e2cda6f9b6f8bbf5188e38b9878ad1d22da85c..280f02dd4ddcb99e530bcd9c957ac2d2ad29456d 100644 (file)
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -42,6 +42,10 @@
        status = "okay";
 };
 
+&clkc {
+       ps-clk-frequency = <33333333>;
+};
+
 &gem0 {
        status = "okay";
        phy-mode = "rgmii-id";

diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index a8bbdfbc7093caad3cdf0ace86052d29a38a0150..34f7812d2ee86f993c6163f3719d8979b0d6ea7d 100644 (file)
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -29,6 +29,10 @@
 
 };
 
+&clkc {
+       ps-clk-frequency = <33333333>;
+};
+
 &gem0 {
        status = "okay";
        phy-mode = "rgmii-id";

diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts
index 697779a353edcda3852fbd381ab2efdb6b40779b..1c7cc990b47a6229c87759f24d6148b68f531154 100644 (file)
--- a/arch/arm/boot/dts/zynq-zed.dts
+++ b/arch/arm/boot/dts/zynq-zed.dts
@@ -29,6 +29,10 @@
 
 };
 
+&clkc {
+       ps-clk-frequency = <33333333>;
+};
+
 &gem0 {
        status = "okay";
        phy-mode = "rgmii-id";