/// VRBaseMap contains, for each already emitted node, the first virtual
/// register number for the results of the node.
///
- void EmitNode(NodeInfo *NI, std::map<SDNode*, unsigned> &VRBaseMap);
+ void EmitNode(SDNode *Node, std::map<SDNode*, unsigned> &VRBaseMap);
/// EmitNoop - Emit a noop instruction.
///
/// EmitNode - Generate machine code for an node and needed dependencies.
///
-void ScheduleDAG::EmitNode(NodeInfo *NI,
+void ScheduleDAG::EmitNode(SDNode *Node,
std::map<SDNode*, unsigned> &VRBaseMap) {
unsigned VRBase = 0; // First virtual register for node
- SDNode *Node = NI->Node;
// If machine instruction
if (Node->isTargetOpcode()) {
NodeInfo *NI = Ordering[i];
if (NI->isInGroup()) {
NodeGroupIterator NGI(Ordering[i]);
- while (NodeInfo *NI = NGI.next()) EmitNode(NI, VRBaseMap);
+ while (NodeInfo *NI = NGI.next()) EmitNode(NI->Node, VRBaseMap);
} else {
- EmitNode(NI, VRBaseMap);
+ EmitNode(NI->Node, VRBaseMap);
}
}
}
std::map<SDNode*, unsigned> VRBaseMap;
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i]) {
- for (unsigned j = 0, ee = SU->FlaggedNodes.size(); j != ee; j++) {
- SDNode *N = SU->FlaggedNodes[j];
- EmitNode(getNI(N), VRBaseMap);
- }
- EmitNode(getNI(SU->Node), VRBaseMap);
+ for (unsigned j = 0, ee = SU->FlaggedNodes.size(); j != ee; j++)
+ EmitNode(SU->FlaggedNodes[j], VRBaseMap);
+ EmitNode(SU->Node, VRBaseMap);
} else {
// Null SUnit* is a noop.
EmitNoop();
void ScheduleDAGList::Schedule() {
DEBUG(std::cerr << "********** List Scheduling **********\n");
- // Set up minimum info for scheduling
- PrepareNodeInfo();
-
// Build scheduling units.
BuildSchedUnits();