--- /dev/null
+#include <linux/fb.h>\r
+#include <linux/delay.h>\r
+#include "../../rk29_fb.h"\r
+#include <mach/gpio.h>\r
+#include <mach/iomux.h>\r
+#include <mach/board.h>\r
+#include "screen.h"\r
+\r
+/* Base */\r
+#define OUT_TYPE SCREEN_RGB\r
+#define OUT_FACE OUT_P888\r
+#define OUT_CLK 26 //***27\r
+\r
+/* Timing */\r
+#define H_PW 16 //8Ç°ÏûÓ°\r
+#define H_BP 24//6\r
+#define H_VD 480//320 //***800 \r
+#define H_FP 16//60\r
+\r
+#define V_PW 2//12\r
+#define V_BP 2// 4\r
+#define V_VD 800//480 //***480\r
+#define V_FP 4//40\r
+\r
+/* Other */\r
+#define DCLK_POL 1//0 \r
+#define SWAP_RB 0\r
+\r
+static struct rk29lcd_info *gLcd_info = NULL;\r
+int init(void);\r
+int standby(u8 enable);\r
+\r
+#define TXD_PORT gLcd_info->txd_pin\r
+#define CLK_PORT gLcd_info->clk_pin\r
+#define CS_PORT gLcd_info->cs_pin\r
+\r
+#define CS_OUT() gpio_direction_output(CS_PORT, 1)\r
+#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH)\r
+#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW)\r
+#define CLK_OUT() gpio_direction_output(CLK_PORT, 0) \r
+#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH)\r
+#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW)\r
+#define TXD_OUT() gpio_direction_output(TXD_PORT, 1) \r
+#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH)\r
+#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW)\r
+\r
+\r
+#define DRVDelayUs(i) udelay(i*4)\r
+\r
+void spi_screenreg_cmd(u8 Addr)\r
+{\r
+ u32 i;\r
+ u32 control_bit;\r
+\r
+ TXD_OUT();\r
+ CLK_OUT();\r
+ CS_OUT();\r
+ DRVDelayUs(2);\r
+ DRVDelayUs(2);\r
+\r
+ CS_SET();\r
+ TXD_SET();\r
+ CLK_CLR();\r
+ DRVDelayUs(30);\r
+\r
+ CS_CLR();\r
+ control_bit = 0x0000;\r
+ Addr = (control_bit | Addr);//spi_screenreg_set(0x36, 0x0000, 0xffff); \r
+ //printk("addr is 0x%x \n", Addr); \r
+ for(i = 0; i < 9; i++) //reg\r
+ {\r
+ if(Addr &(1<<(8-i)))\r
+ TXD_SET();\r
+ else\r
+ TXD_CLR();\r
+\r
+ // \u6a21\u62dfCLK\r
+ CLK_SET();\r
+ DRVDelayUs(2);\r
+ CLK_CLR();\r
+ DRVDelayUs(2);\r
+ }\r
+\r
+ CS_SET();\r
+ TXD_SET();\r
+ CLK_CLR(); \r
+ DRVDelayUs(10);\r
+}\r
+\r
+\r
+void spi_screenreg_param(u8 Param)\r
+{\r
+\r
+ u32 i;\r
+ u32 control_bit;\r
+\r
+ CS_CLR();\r
+ \r
+ control_bit = 0x0100;\r
+ Param = (control_bit | Param);\r
+ //printk("data0 is 0x%x \n", Data); \r
+ for(i = 0; i < 9; i++) //data\r
+ {\r
+ if(Param &(1<<(8-i)))\r
+ TXD_SET();\r
+ else\r
+ TXD_CLR();\r
+\r
+ // \u6a21\u62dfCLK\r
+ CLK_SET();\r
+ DRVDelayUs(2);\r
+ CLK_CLR();\r
+ DRVDelayUs(2);\r
+ }\r
+\r
+ CS_SET();\r
+ CLK_CLR();\r
+ TXD_CLR();\r
+ DRVDelayUs(10);\r
+}\r
+\r
+void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )\r
+{\r
+ //printk("lcd_hx8357 set_lcd_info \n"); \r
+ /* screen type & face */\r
+ screen->type = OUT_TYPE;\r
+ screen->face = OUT_FACE;\r
+ \r
+ /* Screen size */\r
+ screen->x_res = H_VD;\r
+ screen->y_res = V_VD;\r
+\r
+ /* Timing */\r
+ screen->pixclock = OUT_CLK;\r
+ screen->left_margin = H_BP; /*>2*/ \r
+ screen->right_margin = H_FP; /*>2*/ \r
+ screen->hsync_len = H_PW; /*>2*/ //***all > 326, 4<PW+BP<15, \r
+ screen->upper_margin = V_BP; /*>2*/ \r
+ screen->lower_margin = V_FP; /*>2*/ \r
+ screen->vsync_len = V_PW; /*>6*/ \r
+\r
+ /* Pin polarity */\r
+ screen->pin_hsync = 0; \r
+ screen->pin_vsync = 0; \r
+ screen->pin_den = 0;\r
+ screen->pin_dclk = DCLK_POL;\r
+\r
+ /* Swap rule */\r
+ screen->swap_rb = SWAP_RB;\r
+ screen->swap_rg = 0;\r
+ screen->swap_gb = 0;\r
+ screen->swap_delta = 0;\r
+ screen->swap_dumy = 0;\r
+\r
+ /* Operation function*/\r
+ screen->init = init;\r
+ screen->standby = standby;\r
+ if(lcd_info)\r
+ gLcd_info = lcd_info;\r
+}\r
+\r
+int init(void)\r
+{ \r
+ volatile u32 data;\r
+\r
+ if(gLcd_info)\r
+ gLcd_info->io_init();\r
+\r
+ printk("lcd init...\n");\r
+ spi_screenreg_cmd(0xB1);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_cmd(0xB2);\r
+ spi_screenreg_param(0x10);\r
+ spi_screenreg_param(0xC7);\r
+ spi_screenreg_cmd(0xB3);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_cmd(0xB4);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_cmd(0xB9);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_cmd(0xC3);\r
+ spi_screenreg_param(0x07);\r
+ spi_screenreg_cmd(0xB2);\r
+ spi_screenreg_param(0x04);\r
+ spi_screenreg_param(0x0B);\r
+ spi_screenreg_param(0x0B);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x07);\r
+ spi_screenreg_param(0x04);\r
+ spi_screenreg_cmd(0xC5);\r
+ spi_screenreg_param(0x6E);\r
+ spi_screenreg_cmd(0xC2);\r
+ spi_screenreg_param(0x20);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x10);\r
+ mdelay(20);//20ms\r
+ \r
+ spi_screenreg_cmd(0xC8);\r
+ spi_screenreg_param(0xA3);\r
+ spi_screenreg_cmd(0xC9);\r
+ spi_screenreg_param(0x32);\r
+ spi_screenreg_param(0x06);\r
+ spi_screenreg_cmd(0xD7);\r
+ spi_screenreg_param(0x03);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x0F);\r
+ spi_screenreg_param(0x0F);\r
+ spi_screenreg_cmd(0xCF);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x08);\r
+ spi_screenreg_cmd(0xB6);\r
+ spi_screenreg_param(0x20);\r
+ spi_screenreg_param(0xC2);\r
+ spi_screenreg_param(0xFF);\r
+ spi_screenreg_param(0x04);\r
+ spi_screenreg_cmd(0xEA);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_cmd(0x2A);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x01);\r
+ spi_screenreg_param(0xDF);\r
+ spi_screenreg_cmd(0x2B);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x03);\r
+ spi_screenreg_param(0xEF);\r
+ spi_screenreg_cmd(0xB0);\r
+ spi_screenreg_param(0x01);\r
+ spi_screenreg_cmd(0x0C);\r
+ spi_screenreg_param(0x50);\r
+ spi_screenreg_cmd(0x36);\r
+ spi_screenreg_param(0x48);\r
+ spi_screenreg_cmd(0x3A);\r
+ spi_screenreg_param(0x66);\r
+ spi_screenreg_cmd(0xE0);\r
+ spi_screenreg_param(0x05);\r
+ spi_screenreg_param(0x07);\r
+ spi_screenreg_param(0x0B);\r
+ spi_screenreg_param(0x14);\r
+ spi_screenreg_param(0x11);\r
+ spi_screenreg_param(0x14);\r
+ spi_screenreg_param(0x0A);\r
+ spi_screenreg_param(0x07);\r
+ spi_screenreg_param(0x04);\r
+ spi_screenreg_param(0x0B);\r
+ spi_screenreg_param(0x02);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x04);\r
+ spi_screenreg_param(0x33);\r
+ spi_screenreg_param(0x36);\r
+ spi_screenreg_param(0x1F);\r
+ spi_screenreg_cmd(0xE1);\r
+ spi_screenreg_param(0x1F);\r
+ spi_screenreg_param(0x36);\r
+ spi_screenreg_param(0x33);\r
+ spi_screenreg_param(0x04);\r
+ spi_screenreg_param(0x00);\r
+ spi_screenreg_param(0x02);\r
+ spi_screenreg_param(0x0B);\r
+ spi_screenreg_param(0x04);\r
+ spi_screenreg_param(0x07);\r
+ spi_screenreg_param(0x0A);\r
+ spi_screenreg_param(0x14);\r
+ spi_screenreg_param(0x11);\r
+ spi_screenreg_param(0x14);\r
+ spi_screenreg_param(0x0B);\r
+ spi_screenreg_param(0x07);\r
+ spi_screenreg_param(0x05);\r
+ spi_screenreg_cmd(0x11);\r
+ mdelay(70);\r
+ spi_screenreg_cmd(0x29);\r
+ mdelay(10);\r
+ spi_screenreg_cmd(0x2C);\r
+ if(gLcd_info)\r
+ gLcd_info->io_deinit();\r
+\r
+ return 0;\r
+}\r
+\r
+int standby(u8 enable) //***enable =1 means suspend, 0 means resume \r
+{\r
+ \r
+ if(gLcd_info)\r
+ gLcd_info->io_init();\r
+ #if 0\r
+ if(enable) {\r
+ spi_screenreg_set(0x10, 0xffff, 0xffff);\r
+ spi_screenreg_set(0x28, 0xffff, 0xffff);\r
+ } else { \r
+ spi_screenreg_set(0x29, 0xffff, 0xffff);\r
+ spi_screenreg_set(0x11, 0xffff, 0xffff);\r
+ }\r
+ #endif\r
+ if(gLcd_info)\r
+ gLcd_info->io_deinit();\r
+ return 0;\r
+}\r
+void set_backlight(int brightness)\r
+{\r
+#if 0\r
+ if (g_spi != NULL)\r
+ {\r
+ fbprintk("AMS369FG06:set_backlight = %d\r\n", brightness);\r
+ if (brightness < 0)\r
+ {\r
+ brightness = 0;\r
+ }\r
+ if (brightness > 4)\r
+ {\r
+ brightness = 4;\r
+ }\r
+\r
+ g_backlight_level = brightness;\r
+ write_data(pBrighenessLevel[brightness], ARRAY_SIZE(pBrighenessLevel[brightness]));\r
+ }\r
+#endif\r
+}\r
+void rk2818_backlight_ctl(int suspend)\r
+{\r
+ standby(suspend);\r
+}
\ No newline at end of file