+++ /dev/null
-/********************************************************************
-** display output interface supported by rockchip lcdc *
-********************************************************************/
-/* */
-#define OUT_P888 0 //24bit screen,connect to lcdc D0~D23
-#define OUT_P666 1 //18bit screen,connect to lcdc D0~D17
-#define OUT_P565 2
-#define OUT_S888x 4
-#define OUT_CCIR656 6
-#define OUT_S888 8
-#define OUT_S888DUMY 12
-#define OUT_RGB_AAA 15
-#define OUT_P16BPP4 24
-#define OUT_D888_P666 0x21 //18bit screen,connect to lcdc D2~D7, D10~D15, D18~D23
-#define OUT_D888_P565 0x22
-
-/*******************register definition**********************/
-
-#define SYS_CTRL (0x00)
-#define m_WIN0_EN (1<<0)
-#define m_WIN1_EN (1<<1)
-#define m_HWC_EN (1<<2)
-#define m_WIN0_FORMAT (7<<3)
-#define m_WIN1_FORMAT (7<<6)
-#define m_HWC_COLOR_MODE (1<<9)
-#define m_HWC_SIZE (1<<10)
-#define m_WIN0_3D_EN (1<<11)
-#define m_WIN0_3D_MODE (7<<12)
-#define m_WIN0_RB_SWAP (1<<15)
-#define m_WIN0_ALPHA_SWAP (1<<16)
-#define m_WIN0_Y8_SWAP (1<<17)
-#define m_WIN0_UV_SWAP (1<<18)
-#define m_WIN1_RB_SWAP (1<<19)
-#define m_WIN1_ALPHA_SWAP (1<<20)
-#define m_WIN1_BL_SWAP (1<<21)
-#define m_WIN0_OTSD_DISABLE (1<<22)
-#define m_WIN1_OTSD_DISABLE (1<<23)
-#define m_DMA_BURST_LENGTH (3<<24)
-#define m_HWC_LODAD_EN (1<<26)
-#define m_WIN1_LUT_EN (1<<27)
-#define m_DSP_LUT_EN (1<<28)
-#define m_DMA_STOP (1<<29)
-#define m_LCDC_STANDBY (1<<30)
-#define m_AUTO_GATING_EN (1<<31)
-#define v_WIN0_EN(x) (((x)&1)<<0)
-#define v_WIN1_EN(x) (((x)&1)<<1)
-#define v_HWC_EN(x) (((x)&1)<<2)
-#define v_WIN0_FORMAT(x) (((x)&7)<<3)
-#define v_WIN1_FORMAT(x) (((x)&7)<<6)
-#define v_HWC_COLOR_MODE(x) (((x)&1)<<9)
-#define v_HWC_SIZE(x) (((x)&1)<<10)
-#define v_WIN0_3D_EN(x) (((x)&1)<<11)
-#define v_WIN0_3D_MODE(x) (((x)&7)<<12)
-#define v_WIN0_RB_SWAP(x) (((x)&1)<<15)
-#define v_WIN0_ALPHA_SWAP(x) (((x)&1)<<16)
-#define v_WIN0_Y8_SWAP(x) (((x)&1)<<17)
-#define v_WIN0_UV_SWAP(x) (((x)&1)<<18)
-#define v_WIN1_RB_SWAP(x) (((x)&1)<<19)
-#define v_WIN1_ALPHA_SWAP(x) (((x)&1)<<20)
-#define v_WIN1_BL_SWAP(x) (((x)&1)<<21)
-#define v_WIN0_OTSD_DISABLE(x) (((x)&1)<<22)
-#define v_WIN1_OTSD_DISABLE(x) (((x)&1)<<23)
-#define v_DMA_BURST_LENGTH(x) (((x)&3)<<24)
-#define v_HWC_LODAD_EN(x) (((x)&1)<<26)
-#define v_WIN1_LUT_EN(x) (((x)&1)<<27)
-#define v_DSP_LUT_EN(x) (((x)&1)<<28)
-#define v_DMA_STOP(x) (((x)&1)<<29)
-#define v_LCDC_STANDBY(x) (((x)&1)<<30)
-#define v_AUTO_GATING_EN(x) (((x)&1)<<31)
-
-
-#define DSP_CTRL0 (0x04)
-#define m_DSP_OUT_FORMAT (0x0f<<0)
-#define m_HSYNC_POL (1<<4)
-#define m_VSYNC_POL (1<<5)
-#define m_DEN_POL (1<<6)
-#define m_DCLK_POL (1<<7)
-#define m_WIN0_TOP (1<<8)
-#define m_DITHER_UP_EN (1<<9)
-#define m_DITHER_DOWN_MODE (1<<10)
-#define m_DITHER_DOWN_EN (1<<11)
-#define m_INTERLACE_DSP_EN (1<<12)
-#define m_INTERLACE_POL (1<<13)
-#define m_WIN0_INTERLACE_EN (1<<14)
-#define m_WIN1_INTERLACE_EN (1<<15)
-#define m_WIN0_YRGB_DEFLICK_EN (1<<16)
-#define m_WIN0_CBR_DEFLICK_EN (1<<17)
-#define m_WIN0_ALPHA_MODE (1<<18)
-#define m_WIN1_ALPHA_MODE (1<<19)
-#define m_WIN0_CSC_MODE (3<<20)
-#define m_WIN1_CSC_MODE (1<<22)
-#define m_WIN0_YUV_CLIP (1<<23)
-#define m_DSP_CCIR656_AVG (1<<24)
-#define m_DCLK_OUTPUT_MODE (1<<25)
-#define m_DCLK_PHASE_LOCK (1<<26)
-#define m_DITHER_DOWN_SEL (3<<27)
-#define m_ALPHA_MODE_SEL0 (1<<29)
-#define m_ALPHA_MODE_SEL1 (1<<30)
-#define m_DIFF_DCLK_EN (1<<31)
-#define v_DSP_OUT_FORMAT(x) (((x)&0x0f)<<0)
-#define v_HSYNC_POL(x) (((x)&1)<<4)
-#define v_VSYNC_POL(x) (((x)&1)<<5)
-#define v_DEN_POL(x) (((x)&1)<<6)
-#define v_DCLK_POL(x) (((x)&1)<<7)
-#define v_WIN0_TOP(x) (((x)&1)<<8)
-#define v_DITHER_UP_EN(x) (((x)&1)<<9)
-#define v_DITHER_DOWN_MODE(x) (((x)&1)<<10)
-#define v_DITHER_DOWN_EN(x) (((x)&1)<<11)
-#define v_INTERLACE_DSP_EN(x) (((x)&1)<<12)
-#define v_INTERLACE_POL(x) (((x)&1)<<13)
-#define v_WIN0_INTERLACE_EN(x) (((x)&1)<<14)
-#define v_WIN1_INTERLACE_EN(x) (((x)&1)<<15)
-#define v_WIN0_YRGB_DEFLICK_EN(x) (((x)&1)<<16)
-#define v_WIN0_CBR_DEFLICK_EN(x) (((x)&1)<<17)
-#define v_WIN0_ALPHA_MODE(x) (((x)&1)<<18)
-#define v_WIN1_ALPHA_MODE(x) (((x)&1)<<19)
-#define v_WIN0_CSC_MODE(x) (((x)&3)<<20)
-#define v_WIN1_CSC_MODE(x) (((x)&1)<<22)
-#define v_WIN0_YUV_CLIP(x) (((x)&1)<<23)
-#define v_DSP_CCIR656_AVG(x) (((x)&1)<<24)
-#define v_DCLK_OUTPUT_MODE(x) (((x)&1)<<25)
-#define v_DCLK_PHASE_LOCK(x) (((x)&1)<<26)
-#define v_DITHER_DOWN_SEL(x) (((x)&1)<<27)
-#define v_ALPHA_MODE_SEL0(x) (((x)&1)<<29)
-#define v_ALPHA_MODE_SEL1(x) (((x)&1)<<30)
-#define v_DIFF_DCLK_EN(x) (((x)&1)<<31)
-
-
-#define DSP_CTRL1 (0x08)
-#define m_BG_COLOR (0xffffff<<0)
-#define m_BG_B (0xff<<0)
-#define m_BG_G (0xff<<8)
-#define m_BG_R (0xff<<16)
-#define m_BLANK_EN (1<<24)
-#define m_BLACK_EN (1<<25)
-#define m_DSP_BG_SWAP (1<<26)
-#define m_DSP_RB_SWAP (1<<27)
-#define m_DSP_RG_SWAP (1<<28)
-#define m_DSP_DELTA_SWAP (1<<29)
-#define m_DSP_DUMMY_SWAP (1<<30)
-#define m_DSP_OUT_ZERO (1<<31)
-#define v_BG_COLOR(x) (((x)&0xffffff)<<0)
-#define v_BG_B(x) (((x)&0xff)<<0)
-#define v_BG_G(x) (((x)&0xff)<<8)
-#define v_BG_R(x) (((x)&0xff)<<16)
-#define v_BLANK_EN(x) (((x)&1)<<24)
-#define v_BLACK_EN(x) (((x)&1)<<25)
-#define v_DSP_BG_SWAP(x) (((x)&1)<<26)
-#define v_DSP_RB_SWAP(x) (((x)&1)<<27)
-#define v_DSP_RG_SWAP(x) (((x)&1)<<28)
-#define v_DSP_DELTA_SWAP(x) (((x)&1)<<29)
-#define v_DSP_DUMMY_SWAP(x) (((x)&1)<<30)
-#define v_DSP_OUT_ZERO(x) (((x)&1)<<31)
-
-
-#define MCU_CTRL (0x0c)
-#define m_MCU_PIX_TOTAL (0x3f<<0)
-#define m_MCU_CS_ST (0x0f<<6)
-#define m_MCU_CS_END (0x3f<<10)
-#define m_MCU_RW_ST (0x0f<<16)
-#define m_MCU_RW_END (0x3f<<20)
-#define m_MCU_CLK_SEL (1<<26)
-#define m_MCU_HOLD_MODE (1<<27)
-#define m_MCU_FS_HOLD_STA (1<<28)
-#define m_MCU_RS_SELECT (1<<29)
-#define m_MCU_BYPASS (1<<30)
-#define m_MCU_TYPE (1<<31)
-
-#define v_MCU_PIX_TOTAL(x) (((x)&0x3f)<<0)
-#define v_MCU_CS_ST(x) (((x)&0x0f)<<6)
-#define v_MCU_CS_END(x) (((x)&0x3f)<<10)
-#define v_MCU_RW_ST(x) (((x)&0x0f)<<16)
-#define v_MCU_RW_END(x) (((x)&0x3f)<<20)
-#define v_MCU_CLK_SEL(x) (((x)&1)<<26)
-#define v_MCU_HOLD_MODE(x) (((x)&1)<<27)
-#define v_MCU_FS_HOLD_STA(x) (((x)&1)<<28)
-#define v_MCU_RS_SELECT(x) (((x)&1)<<29)
-#define v_MCU_BYPASS(x) (((x)&1)<<30)
-#define v_MCU_TYPE(x) (((x)&1)<<31)
-
-#define INT_STATUS (0x10)
-#define m_HS_INT_STA (1<<0) //status
-#define m_FS_INT_STA (1<<1)
-#define m_LF_INT_STA (1<<2)
-#define m_BUS_ERR_INT_STA (1<<3)
-#define m_HS_INT_EN (1<<4) //enable
-#define m_FS_INT_EN (1<<5)
-#define m_LF_INT_EN (1<<6)
-#define m_BUS_ERR_INT_EN (1<<7)
-#define m_HS_INT_CLEAR (1<<8) //auto clear
-#define m_FS_INT_CLEAR (1<<9)
-#define m_LF_INT_CLEAR (1<<10)
-#define m_BUS_ERR_INT_CLEAR (1<<11)
-#define m_LF_INT_NUM (0xfff<<12)
-#define v_HS_INT_EN(x) (((x)&1)<<4)
-#define v_FS_INT_EN(x) (((x)&1)<<5)
-#define v_LF_INT_EN(x) (((x)&1)<<6)
-#define v_BUS_ERR_INT_EN(x) (((x)&1)<<7)
-#define v_HS_INT_CLEAR(x) (((x)&1)<<8)
-#define v_FS_INT_CLEAR(x) (((x)&1)<<9)
-#define v_LF_INT_CLEAR(x) (((x)&1)<<10)
-#define v_BUS_ERR_INT_CLEAR(x) (((x)&1)<<11)
-#define v_LF_INT_NUM(x) (((x)&0xfff)<<12)
-
-
-#define ALPHA_CTRL (0x14)
-#define m_WIN0_ALPHA_EN (1<<0)
-#define m_WIN1_ALPHA_EN (1<<1)
-#define m_HWC_ALPAH_EN (1<<2)
-#define m_WIN0_ALPHA_VAL (0xff<<4)
-#define m_WIN1_ALPHA_VAL (0xff<<12)
-#define m_HWC_ALPAH_VAL (0x0f<<20)
-#define v_WIN0_ALPHA_EN(x) (((x)&1)<<0)
-#define v_WIN1_ALPHA_EN(x) (((x)&1)<<1)
-#define v_HWC_ALPAH_EN(x) (((x)&1)<<2)
-#define v_WIN0_ALPHA_VAL(x) (((x)&0xff)<<4)
-#define v_WIN1_ALPHA_VAL(x) (((x)&0xff)<<12)
-#define v_HWC_ALPAH_VAL(x) (((x)&0x0f)<<20)
-
-#define WIN0_COLOR_KEY (0x18)
-#define m_COLOR_KEY_VAL (0xffffff<<0)
-#define m_COLOR_KEY_EN (1<<24)
-#define v_COLOR_KEY_VAL(x) (((x)&0xffffff)<<0)
-#define v_COLOR_KEY_EN(x) (((x)&1)<<24)
-
-#define WIN1_COLOR_KEY (0x1C)
-
-
-#define WIN0_YRGB_MST0 (0x20)
-#define WIN0_CBR_MST0 (0x24)
-#define WIN0_YRGB_MST1 (0x28)
-#define WIN0_CBR_MST1 (0x2C)
-#define WIN_VIR (0x30)
-#define m_WIN0_VIR (0x1fff << 0)
-#define m_WIN1_VIR (0x1fff << 16)
-#define v_WIN0_VIR_VAL(x) ((x)<<0)
-#define v_WIN1_VIR_VAL(x) ((x)<<16)
-#define v_ARGB888_VIRWIDTH(x) (((x)&0x1fff)<<0)
-#define v_RGB888_VIRWIDTH(x) (((((x*3)>>2)+((x)%3))&0x1fff)<<0)
-#define v_RGB565_VIRWIDTH(x) ((DIV_ROUND_UP(x,2)&0x1fff)<<0)
-#define v_YUV_VIRWIDTH(x) ((DIV_ROUND_UP(x,4)&0x1fff)<<0)
-#define v_WIN1_ARGB888_VIRWIDTH(x) (((x)&0x1fff)<<16)
-#define v_WIN1_RGB888_VIRWIDTH(x) (((((x*3)>>2)+((x)%3))&0x1fff)<<16)
-#define v_WIN1_RGB565_VIRWIDTH(x) ((DIV_ROUND_UP(x,2)&0x1fff)<<16)
-
-
-
-#define WIN0_ACT_INFO (0x34)
-#define m_ACT_WIDTH (0x1fff<<0)
-#define m_ACT_HEIGHT (0x1fff<<16)
-#define v_ACT_WIDTH(x) (((x-1)&0x1fff)<<0)
-#define v_ACT_HEIGHT(x) (((x-1)&0x1fff)<<16)
-
-#define WIN0_DSP_INFO (0x38)
-#define v_DSP_WIDTH(x) (((x-1)&0x7ff)<<0)
-#define v_DSP_HEIGHT(x) (((x-1)&0x7ff)<<16)
-
-#define WIN0_DSP_ST (0x3C)
-#define v_DSP_STX(x) (((x)&0xfff)<<0)
-#define v_DSP_STY(x) (((x)&0xfff)<<16)
-
-#define WIN0_SCL_FACTOR_YRGB (0x40)
-#define v_X_SCL_FACTOR(x) (((x)&0xffff)<<0)
-#define v_Y_SCL_FACTOR(x) (((x)&0xffff)<<16)
-
-#define WIN0_SCL_FACTOR_CBR (0x44)
-#define WIN0_SCL_OFFSET (0x48)
-#define WIN1_MST (0x4C)
-#define WIN1_DSP_INFO (0x50)
-#define WIN1_DSP_ST (0x54)
-#define HWC_MST (0x58)
-#define HWC_DSP_ST (0x5C)
-#define HWC_COLOR_LUT0 (0x60)
-#define HWC_COLOR_LUT1 (0x64)
-#define HWC_COLOR_LUT2 (0x68)
-#define DSP_HTOTAL_HS_END (0x6C)
-#define v_HSYNC(x) (((x)&0xfff)<<0) //hsync pulse width
-#define v_HORPRD(x) (((x)&0xfff)<<16) //horizontal period
-
-#define DSP_HACT_ST_END (0x70)
-#define v_HAEP(x) (((x)&0xfff)<<0) //horizontal active end point
-#define v_HASP(x) (((x)&0xfff)<<16) //horizontal active start point
-
-#define DSP_VTOTAL_VS_END (0x74)
-#define v_VSYNC(x) (((x)&0xfff)<<0)
-#define v_VERPRD(x) (((x)&0xfff)<<16)
-#define DSP_VACT_ST_END (0x78)
-#define v_VAEP(x) (((x)&0xfff)<<0)
-#define v_VASP(x) (((x)&0xfff)<<16)
-
-#define DSP_VS_ST_END_F1 (0x7C)
-#define DSP_VACT_ST_END_F1 (0x80)
-#define REG_CFG_DONE (0x90)
-#define MCU_BYPASS_WPORT (0x100)
-#define MCU_BYPASS_RPORT (0x200)
-#define WIN1_LUT_ADDR (0x400)
-#define DSP_LUT_ADDR (0x800)
-
-/*
- RK3026/RK3028A max output resolution 1920x1080
- support IEP instead of 3d
-*/
-//#ifdef CONFIG_ARCH_RK3026
-//SYS_CTRL 0x00
-#define m_DIRECT_PATCH_EN (1<<11)
-#define m_DIRECT_PATH_LAY_SEL (1<<12)
-
-#define v_DIRECT_PATCH_EN(x) (((x)&1)<<11)
-#define v_DIRECT_PATH_LAY_SEL(x) (((x)&1)<<12)
-
-//INT_STATUS 0x10
-#define m_WIN0_EMPTY_INTR_EN (1<<24)
-#define m_WIN1_EMPTY_INTR_EN (1<<25)
-#define m_WIN0_EMPTY_INTR_CLR (1<<26)
-#define m_WIN1_EMPTY_INTR_CLR (1<<27)
-#define m_WIN0_EMPTY_INTR_STA (1<<28)
-#define m_WIN1_EMPTY_INTR_STA (1<<29)
-
-#define v_WIN0_EMPTY_INTR_EN(x) (((x)&1)<<24)
-#define v_WIN1_EMPTY_INTR_EN(x) (((x)&1)<<25)
-#define v_WIN0_EMPTY_INTR_CLR(x) (((x)&1)<<26)
-#define v_WIN1_EMPTY_INTR_CLR(x) (((x)&1)<<27)
-#define v_WIN0_EMPTY_INTR_STA(x) (((x)&1)<<28)
-#define v_WIN1_EMPTY_INTR_STA(x) (((x)&1)<<29)
-//#endif
-
-
-#define CalScale(x, y) ((((u32)(x-1))*0x1000)/(y-1))
-
-static inline void lcdc_writel(struct fimd_context *ctx,u32 offset,u32 v)
-{
- u32 *_pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- *_pv = v;
- writel_relaxed(v,ctx->regs+offset);
-}
-
-static inline u32 lcdc_readl(struct fimd_context *ctx,u32 offset)
-{
- u32 v;
- u32 *_pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- v = readl_relaxed(ctx->regs+offset);
- *_pv = v;
- return v;
-}
-
-static inline u32 lcdc_read_bit(struct fimd_context *ctx,u32 offset,u32 msk)
-{
- u32 _v = readl_relaxed(ctx->regs+offset);
- _v &= msk;
- return (_v >> msk);
-}
-
-static inline void lcdc_set_bit(struct fimd_context *ctx,u32 offset,u32 msk)
-{
- u32* _pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- (*_pv) |= msk;
- writel_relaxed(*_pv,ctx->regs + offset);
-}
-
-static inline void lcdc_clr_bit(struct fimd_context *ctx,u32 offset,u32 msk)
-{
- u32* _pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- (*_pv) &= (~msk);
- writel_relaxed(*_pv,ctx->regs + offset);
-}
-
-static inline void lcdc_msk_reg(struct fimd_context *ctx,u32 offset,u32 msk,u32 v)
-{
- u32 *_pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- (*_pv) &= (~msk);
- (*_pv) |= v;
- writel_relaxed(*_pv,ctx->regs+offset);
-}
-
-static inline void lcdc_cfg_done(struct fimd_context *ctx)
-{
- writel_relaxed(0x01,ctx->regs+REG_CFG_DONE);
- dsb();
-}
-
-
+++ /dev/null
-/********************************************************************
-** display output interface supported by rockchip lcdc *
-********************************************************************/
-/* */
-#define OUT_P888 0 //24bit screen,connect to lcdc D0~D23
-#define OUT_P666 1 //18bit screen,connect to lcdc D0~D17
-#define OUT_P565 2
-#define OUT_S888x 4
-#define OUT_CCIR656 6
-#define OUT_S888 8
-#define OUT_S888DUMY 12
-#define OUT_RGB_AAA 15
-#define OUT_P16BPP4 24
-#define OUT_D888_P666 0x21 //18bit screen,connect to lcdc D2~D7, D10~D15, D18~D23
-#define OUT_D888_P565 0x22
-
-/*******************register definition**********************/
-
-#define REG_CFG_DONE (0x0000)
-#define VERSION_INFO (0x0004)
-#define m_RTL_VERSION (0xffff<<0)
-#define m_FPGA_VERSION (0xffff<<16)
-#define SYS_CTRL (0x0008)
-#define v_DIRECT_PATH_EN(x) (((x)&1)<<0)
-#define v_DIRECT_PATCH_SEL(x) (((x)&3)<<1)
-#define v_DOUB_CHANNEL_EN(x) (((x)&1)<<3)
-#define v_DOUB_CH_OVERLAP_NUM(x) (((x)&0xf)<<4)
-#define v_EDPI_HALT_EN(x) (((x)&1)<<8)
-#define v_EDPI_WMS_MODE(x) (((x)&1)<<9)
-#define v_EDPI_WMS_FS(x) (((x)&1)<<10)
-#define v_RGB_OUT_EN(x) (((x)&1)<<12)
-#define v_HDMI_OUT_EN(x) (((x)&1)<<13)
-#define v_EDP_OUT_EN(x) (((x)&1)<<14)
-#define v_MIPI_OUT_EN(x) (((x)&1)<<15)
-#define v_DMA_BURST_LENGTH(x) (((x)&3)<<18)
-#define v_MMU_EN(x) (((x)&1)<<20)
-#define v_DMA_STOP(x) (((x)&1)<<21)
-#define v_STANDBY_EN(x) (((x)&1)<<22)
-#define v_AUTO_GATING_EN(x) (((x)&1)<<23)
-
-#define m_DIRECT_PATH_EN (1<<0)
-#define m_DIRECT_PATCH_SEL (3<<1)
-#define m_DOUB_CHANNEL_EN (1<<3)
-#define m_DOUB_CH_OVERLAP_NUM (0xf<<4)
-#define m_EDPI_HALT_EN (1<<8)
-#define m_EDPI_WMS_MODE (1<<9)
-#define m_EDPI_WMS_FS (1<<10)
-#define m_RGB_OUT_EN (1<<12)
-#define m_HDMI_OUT_EN (1<<13)
-#define m_EDP_OUT_EN (1<<14)
-#define m_MIPI_OUT_EN (1<<15)
-#define m_DMA_BURST_LENGTH (3<<18)
-#define m_MMU_EN (1<<20)
-#define m_DMA_STOP (1<<21)
-#define m_STANDBY_EN (1<<22)
-#define m_AUTO_GATING_EN (1<<23)
-#define SYS_CTRL1 (0x000c)
-#define v_NOC_HURRY_EN(x) (((x)&0x1 )<<0 )
-#define v_NOC_HURRY_VALUE(x) (((x)&0x3 )<<1 )
-#define v_NOC_HURRY_THRESHOLD(x) (((x)&0x3f)<<3 )
-#define v_NOC_QOS_EN(x) (((x)&0x1 )<<9 )
-#define v_NOC_WIN_QOS(x) (((x)&0x3 )<<10)
-#define v_AXI_MAX_OUTSTANDING_EN(x) (((x)&0x1 )<<12)
-#define v_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<13)
-
-#define m_NOC_HURRY_EN (0x1 <<0 )
-#define m_NOC_HURRY_VALUE (0x3 <<1 )
-#define m_NOC_HURRY_THRESHOLD (0x3f<<3 )
-#define m_NOC_QOS_EN (0x1 <<9 )
-#define m_NOC_WIN_QOS (0x3 <<10)
-#define m_AXI_MAX_OUTSTANDING_EN (0x1 <<12)
-#define m_AXI_OUTSTANDING_MAX_NUM (0x1f<<13)
-
-#define DSP_CTRL0 (0x0010)
-#define v_DSP_OUT_MODE(x) (((x)&0x0f)<<0)
-#define v_DSP_HSYNC_POL(x) (((x)&1)<<4)
-#define v_DSP_VSYNC_POL(x) (((x)&1)<<5)
-#define v_DSP_DEN_POL(x) (((x)&1)<<6)
-#define v_DSP_DCLK_POL(x) (((x)&1)<<7)
-#define v_DSP_DCLK_DDR(x) (((x)&1)<<8)
-#define v_DSP_DDR_PHASE(x) (((x)&1)<<9)
-#define v_DSP_INTERLACE(x) (((x)&1)<<10)
-#define v_DSP_FIELD_POL(x) (((x)&1)<<11)
-#define v_DSP_BG_SWAP(x) (((x)&1)<<12)
-#define v_DSP_RB_SWAP(x) (((x)&1)<<13)
-#define v_DSP_RG_SWAP(x) (((x)&1)<<14)
-#define v_DSP_DELTA_SWAP(x) (((x)&1)<<15)
-#define v_DSP_DUMMY_SWAP(x) (((x)&1)<<16)
-#define v_DSP_OUT_ZERO(x) (((x)&1)<<17)
-#define v_DSP_BLANK_EN(x) (((x)&1)<<18)
-#define v_DSP_BLACK_EN(x) (((x)&1)<<19)
-#define v_DSP_CCIR656_AVG(x) (((x)&1)<<20)
-#define v_DSP_YUV_CLIP(x) (((x)&1)<<21)
-#define v_DSP_X_MIR_EN(x) (((x)&1)<<22)
-#define v_DSP_Y_MIR_EN(x) (((x)&1)<<23)
-#define m_DSP_OUT_MODE (0x0f<<0)
-#define m_DSP_HSYNC_POL (1<<4)
-#define m_DSP_VSYNC_POL (1<<5)
-#define m_DSP_DEN_POL (1<<6)
-#define m_DSP_DCLK_POL (1<<7)
-#define m_DSP_DCLK_DDR (1<<8)
-#define m_DSP_DDR_PHASE (1<<9)
-#define m_DSP_INTERLACE (1<<10)
-#define m_DSP_FIELD_POL (1<<11)
-#define m_DSP_BG_SWAP (1<<12)
-#define m_DSP_RB_SWAP (1<<13)
-#define m_DSP_RG_SWAP (1<<14)
-#define m_DSP_DELTA_SWAP (1<<15)
-#define m_DSP_DUMMY_SWAP (1<<16)
-#define m_DSP_OUT_ZERO (1<<17)
-#define m_DSP_BLANK_EN (1<<18)
-#define m_DSP_BLACK_EN (1<<19)
-#define m_DSP_CCIR656_AVG (1<<20)
-#define m_DSP_YUV_CLIP (1<<21)
-#define m_DSP_X_MIR_EN (1<<22)
-#define m_DSP_Y_MIR_EN (1<<23)
-
-#define DSP_CTRL1 (0x0014)
-#define v_DSP_LUT_EN(x) (((x)&1)<<0)
-#define v_PRE_DITHER_DOWN_EN(x) (((x)&1)<<1)
-#define v_DITHER_DOWN_EN(x) (((x)&1)<<2)
-#define v_DITHER_DOWN_MODE(x) (((x)&1)<<3)
-#define v_DITHER_DOWN_SEL(x) (((x)&1)<<4)
-#define v_DITHER_UP_EN(x) (((x)&1)<<6)
-#define v_DSP_LAYER0_SEL(x) (((x)&3)<<8)
-#define v_DSP_LAYER1_SEL(x) (((x)&3)<<10)
-#define v_DSP_LAYER2_SEL(x) (((x)&3)<<12)
-#define v_DSP_LAYER3_SEL(x) (((x)&3)<<14)
-#define m_DSP_LUT_EN (1<<0)
-#define m_PRE_DITHER_DOWN_EN (1<<1)
-#define m_DITHER_DOWN_EN (1<<2)
-#define m_DITHER_DOWN_MODE (1<<3)
-#define m_DITHER_DOWN_SEL (1<<4)
-#define m_DITHER_UP_EN (1<<6)
-#define m_DSP_LAYER0_SEL (3<<8)
-#define m_DSP_LAYER1_SEL (3<<10)
-#define m_DSP_LAYER2_SEL (3<<12)
-#define m_DSP_LAYER3_SEL (3<<16)
-
-#define DSP_BG (0x0018)
-#define v_DSP_BG_BLUE(x) (((x)&0x3ff)<<0)
-#define v_DSP_BG_GREEN(x) (((x)&0x3ff)<<10)
-#define v_DSP_BG_RED(x) (((x)&0x3ff)<<20)
-#define m_DSP_BG_BLUE (0x3ff<<0)
-#define m_DSP_BG_GREEN (0x3ff<<10)
-#define m_DSP_BG_RED (0x3ff<<20)
-
-#define MCU_CTRL (0x001c)
-#define v_MCU_PIX_TOTAL(x) (((x)&0x3f)<<0)
-#define v_MCU_CS_PST(x) (((x)&0xf)<<6)
-#define v_MCU_CS_PEND(x) (((x)&0x3f)<<10)
-#define v_MCU_RW_PST(x) (((x)&0xf)<<16)
-#define v_MCU_RW_PEND(x) (((x)&0x3f)<<20)
-#define v_MCU_CLK_SEL(x) (((x)&1)<<26)
-#define v_MCU_HOLD_MODE(x) (((x)&1)<<27)
-#define v_MCU_FRAME_ST(x) (((x)&1)<<28)
-#define v_MCU_RS(x) (((x)&1)<<29)
-#define v_MCU_BYPASS(x) (((x)&1)<<30)
-#define v_MCU_TYPE(x) (((x)&1)<<31)
-#define m_MCU_PIX_TOTAL (0x3f<<0)
-#define m_MCU_CS_PST (0xf<<6)
-#define m_MCU_CS_PEND (0x3f<<10)
-#define m_MCU_RW_PST (0xf<<16)
-#define m_MCU_RW_PEND (0x3f<<20)
-#define m_MCU_CLK_SEL (1<<26)
-#define m_MCU_HOLD_MODE (1<<27)
-#define m_MCU_FRAME_ST (1<<28)
-#define m_MCU_RS (1<<29)
-#define m_MCU_BYPASS (1<<30)
-#define m_MCU_TYPE ((u32)1<<31)
-
-#define INTR_CTRL0 (0x0020)
-#define v_DSP_HOLD_VALID_INTR_STS(x) (((x)&1)<<0)
-#define v_FS_INTR_STS(x) (((x)&1)<<1)
-#define v_LINE_FLAG_INTR_STS(x) (((x)&1)<<2)
-#define v_BUS_ERROR_INTR_STS(x) (((x)&1)<<3)
-#define v_DSP_HOLD_VALID_INTR_EN(x) (((x)&1)<<4)
-#define v_FS_INTR_EN(x) (((x)&1)<<5)
-#define v_LINE_FLAG_INTR_EN(x) (((x)&1)<<6)
-#define v_BUS_ERROR_INTR_EN(x) (((x)&1)<<7)
-#define v_DSP_HOLD_VALID_INTR_CLR(x) (((x)&1)<<8)
-#define v_FS_INTR_CLR(x) (((x)&1)<<9)
-#define v_LINE_FLAG_INTR_CLR(x) (((x)&1)<<10)
-#define v_BUS_ERROR_INTR_CLR(x) (((x)&1)<<11)
-#define v_DSP_LINE_FLAG_NUM(x) (((x)&0xfff)<<12)
-
-#define m_DSP_HOLD_VALID_INTR_STS (1<<0)
-#define m_FS_INTR_STS (1<<1)
-#define m_LINE_FLAG_INTR_STS (1<<2)
-#define m_BUS_ERROR_INTR_STS (1<<3)
-#define m_DSP_HOLD_VALID_INTR_EN (1<<4)
-#define m_FS_INTR_EN (1<<5)
-#define m_LINE_FLAG_INTR_EN (1<<6)
-#define m_BUS_ERROR_INTR_EN (1<<7)
-#define m_DSP_HOLD_VALID_INTR_CLR (1<<8)
-#define m_FS_INTR_CLR (1<<9)
-#define m_LINE_FLAG_INTR_CLR (1<<10)
-#define m_BUS_ERROR_INTR_CLR (1<<11)
-#define m_DSP_LINE_FLAG_NUM (0xfff<<12)
-
-#define INTR_CTRL1 (0x0024)
-#define v_WIN0_EMPTY_INTR_STS(x) (((x)&1)<<0)
-#define v_WIN1_EMPTY_INTR_STS(x) (((x)&1)<<1)
-#define v_WIN2_EMPTY_INTR_STS(x) (((x)&1)<<2)
-#define v_WIN3_EMPTY_INTR_STS(x) (((x)&1)<<3)
-#define v_HWC_EMPTY_INTR_STS(x) (((x)&1)<<4)
-#define v_POST_BUF_EMPTY_INTR_STS(x) (((x)&1)<<5)
-#define v_PWM_GEN_INTR_STS(x) (((x)&1)<<6)
-#define v_WIN0_EMPTY_INTR_EN(x) (((x)&1)<<8)
-#define v_WIN1_EMPTY_INTR_EN(x) (((x)&1)<<9)
-#define v_WIN2_EMPTY_INTR_EN(x) (((x)&1)<<10)
-#define v_WIN3_EMPTY_INTR_EN(x) (((x)&1)<<11)
-#define v_HWC_EMPTY_INTR_EN(x) (((x)&1)<<12)
-#define v_POST_BUF_EMPTY_INTR_EN(x) (((x)&1)<<13)
-#define v_PWM_GEN_INTR_EN(x) (((x)&1)<<14)
-#define v_WIN0_EMPTY_INTR_CLR(x) (((x)&1)<<16)
-#define v_WIN1_EMPTY_INTR_CLR(x) (((x)&1)<<17)
-#define v_WIN2_EMPTY_INTR_CLR(x) (((x)&1)<<18)
-#define v_WIN3_EMPTY_INTR_CLR(x) (((x)&1)<<19)
-#define v_HWC_EMPTY_INTR_CLR(x) (((x)&1)<<20)
-#define v_POST_BUF_EMPTY_INTR_CLR(x) (((x)&1)<<21)
-#define v_PWM_GEN_INTR_CLR(x) (((x)&1)<<22)
-
-#define m_WIN0_EMPTY_INTR_STS (1<<0)
-#define m_WIN1_EMPTY_INTR_STS (1<<1)
-#define m_WIN2_EMPTY_INTR_STS (1<<2)
-#define m_WIN3_EMPTY_INTR_STS (1<<3)
-#define m_HWC_EMPTY_INTR_STS (1<<4)
-#define m_POST_BUF_EMPTY_INTR_STS (1<<5)
-#define m_PWM_GEN_INTR_STS (1<<6)
-#define m_WIN0_EMPTY_INTR_EN (1<<8)
-#define m_WIN1_EMPTY_INTR_EN (1<<9)
-#define m_WIN2_EMPTY_INTR_EN (1<<10)
-#define m_WIN3_EMPTY_INTR_EN (1<<11)
-#define m_HWC_EMPTY_INTR_EN (1<<12)
-#define m_POST_BUF_EMPTY_INTR_EN (1<<13)
-#define m_PWM_GEN_INTR_EN (1<<14)
-#define m_WIN0_EMPTY_INTR_CLR (1<<16)
-#define m_WIN1_EMPTY_INTR_CLR (1<<17)
-#define m_WIN2_EMPTY_INTR_CLR (1<<18)
-#define m_WIN3_EMPTY_INTR_CLR (1<<19)
-#define m_HWC_EMPTY_INTR_CLR (1<<20)
-#define m_POST_BUF_EMPTY_INTR_CLR (1<<21)
-#define m_PWM_GEN_INTR_CLR (1<<22)
-
-/*win0 register*/
-#define WIN0_CTRL0 (0x0030)
-#define v_WIN0_EN(x) (((x)&1)<<0)
-#define v_WIN0_DATA_FMT(x) (((x)&7)<<1)
-#define v_WIN0_FMT_10(x) (((x)&1)<<4)
-#define v_WIN0_LB_MODE(x) (((x)&7)<<5)
-#define v_WIN0_INTERLACE_READ(x) (((x)&1)<<8)
-#define v_WIN0_NO_OUTSTANDING(x) (((x)&1)<<9)
-#define v_WIN0_CSC_MODE(x) (((x)&3)<<10)
-#define v_WIN0_RB_SWAP(x) (((x)&1)<<12)
-#define v_WIN0_ALPHA_SWAP(x) (((x)&1)<<13)
-#define v_WIN0_MID_SWAP(x) (((x)&1)<<14)
-#define v_WIN0_UV_SWAP(x) (((x)&1)<<15)
-#define v_WIN0_PPAS_ZERO_EN(x) (((x)&1)<<16)
-#define v_WIN0_YRGB_DEFLICK(x) (((x)&1)<<18)
-#define v_WIN0_CBR_DEFLICK(x) (((x)&1)<<19)
-#define v_WIN0_YUV_CLIP(x) (((x)&1)<<20)
-
-#define m_WIN0_EN (1<<0)
-#define m_WIN0_DATA_FMT (7<<1)
-#define m_WIN0_FMT_10 (1<<4)
-#define m_WIN0_LB_MODE (3<<5)
-#define m_WIN0_INTERLACE_READ (1<<8)
-#define m_WIN0_NO_OUTSTANDING (1<<9)
-#define m_WIN0_CSC_MODE (3<<10)
-#define m_WIN0_RB_SWAP (1<<12)
-#define m_WIN0_ALPHA_SWAP (1<<13)
-#define m_WIN0_MID_SWAP (1<<14)
-#define m_WIN0_UV_SWAP (1<<15)
-#define m_WIN0_PPAS_ZERO_EN (1<<16)
-#define m_WIN0_YRGB_DEFLICK (1<<18)
-#define m_WIN0_CBR_DEFLICK (1<<19)
-#define m_WIN0_YUV_CLIP (1<<20)
-
-#define WIN0_CTRL1 (0x0034)
-#define v_WIN0_YRGB_AXI_GATHER_EN(x) (((x)&1)<<0)
-#define v_WIN0_CBR_AXI_GATHER_EN(x) (((x)&1)<<1)
-#define v_WIN0_BIC_COE_SEL(x) (((x)&3)<<2)
-#define v_WIN0_VSD_YRGB_GT4(x) (((x)&1)<<4)
-#define v_WIN0_VSD_YRGB_GT2(x) (((x)&1)<<5)
-#define v_WIN0_VSD_CBR_GT4(x) (((x)&1)<<6)
-#define v_WIN0_VSD_CBR_GT2(x) (((x)&1)<<7)
-#define v_WIN0_YRGB_AXI_GATHER_NUM(x) (((x)&0xf)<<8)
-#define v_WIN0_CBR_AXI_GATHER_NUM(x) (((x)&7)<<12)
-#define v_WIN0_LINE_LOAD_MODE(x) (((x)&1)<<15)
-#define v_WIN0_YRGB_HOR_SCL_MODE(x) (((x)&3)<<16)
-#define v_WIN0_YRGB_VER_SCL_MODE(x) (((x)&3)<<18)
-#define v_WIN0_YRGB_HSD_MODE(x) (((x)&3)<<20)
-#define v_WIN0_YRGB_VSU_MODE(x) (((x)&1)<<22)
-#define v_WIN0_YRGB_VSD_MODE(x) (((x)&1)<<23)
-#define v_WIN0_CBR_HOR_SCL_MODE(x) (((x)&3)<<24)
-#define v_WIN0_CBR_VER_SCL_MODE(x) (((x)&3)<<26)
-#define v_WIN0_CBR_HSD_MODE(x) (((x)&3)<<28)
-#define v_WIN0_CBR_VSU_MODE(x) (((x)&1)<<30)
-#define v_WIN0_CBR_VSD_MODE(x) (((x)&1)<<31)
-
-#define m_WIN0_YRGB_AXI_GATHER_EN (1<<0)
-#define m_WIN0_CBR_AXI_GATHER_EN (1<<1)
-#define m_WIN0_BIC_COE_SEL (3<<2)
-#define m_WIN0_VSD_YRGB_GT4 (1<<4)
-#define m_WIN0_VSD_YRGB_GT2 (1<<5)
-#define m_WIN0_VSD_CBR_GT4 (1<<6)
-#define m_WIN0_VSD_CBR_GT2 (1<<7)
-#define m_WIN0_YRGB_AXI_GATHER_NUM (0xf<<8)
-#define m_WIN0_CBR_AXI_GATHER_NUM (7<<12)
-#define m_WIN0_LINE_LOAD_MODE (1<<15)
-#define m_WIN0_YRGB_HOR_SCL_MODE (3<<16)
-#define m_WIN0_YRGB_VER_SCL_MODE (3<<18)
-#define m_WIN0_YRGB_HSD_MODE (3<<20)
-#define m_WIN0_YRGB_VSU_MODE (1<<22)
-#define m_WIN0_YRGB_VSD_MODE (1<<23)
-#define m_WIN0_CBR_HOR_SCL_MODE (3<<24)
-#define m_WIN0_CBR_VER_SCL_MODE (3<<26)
-#define m_WIN0_CBR_HSD_MODE (3<<28)
-#define m_WIN0_CBR_VSU_MODE ((u32)1<<30)
-#define m_WIN0_CBR_VSD_MODE ((u32)1<<31)
-
-#define WIN0_COLOR_KEY (0x0038)
-#define v_WIN0_COLOR_KEY(x) (((x)&0x3fffffff)<<0)
-#define v_WIN0_COLOR_KEY_EN(x) (((x)&1)<<31)
-#define m_WIN0_COLOR_KEY (0x3fffffff<<0)
-#define m_WIN0_COLOR_KEY_EN ((u32)1<<31)
-
-#define WIN0_VIR (0x003c)
-#define v_WIN0_VIR_STRIDE(x) (((x)&0x3fff)<<0)
-#define v_WIN0_VIR_STRIDE_UV(x) (((x)&0x3fff)<<16)
-#define m_WIN0_VIR_STRIDE (0x3fff<<0)
-#define m_WIN0_VIR_STRIDE_UV (0x3fff<<16)
-
-#define WIN0_YRGB_MST (0x0040)
-#define WIN0_CBR_MST (0x0044)
-#define WIN0_ACT_INFO (0x0048)
-#define v_WIN0_ACT_WIDTH(x) (((x-1)&0x1fff)<<0)
-#define v_WIN0_ACT_HEIGHT(x) (((x-1)&0x1fff)<<16)
-#define m_WIN0_ACT_WIDTH (0x1fff<<0)
-#define m_WIN0_ACT_HEIGHT (0x1fff<<16)
-
-#define WIN0_DSP_INFO (0x004c)
-#define v_WIN0_DSP_WIDTH(x) (((x-1)&0xfff)<<0)
-#define v_WIN0_DSP_HEIGHT(x) (((x-1)&0xfff)<<16)
-#define m_WIN0_DSP_WIDTH (0xfff<<0)
-#define m_WIN0_DSP_HEIGHT (0xfff<<16)
-
-#define WIN0_DSP_ST (0x0050)
-#define v_WIN0_DSP_XST(x) (((x)&0x1fff)<<0)
-#define v_WIN0_DSP_YST(x) (((x)&0x1fff)<<16)
-#define m_WIN0_DSP_XST (0x1fff<<0)
-#define m_WIN0_DSP_YST (0x1fff<<16)
-
-#define WIN0_SCL_FACTOR_YRGB (0x0054)
-#define v_WIN0_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
-#define v_WIN0_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
-#define m_WIN0_HS_FACTOR_YRGB (0xffff<<0)
-#define m_WIN0_VS_FACTOR_YRGB ((u32)0xffff<<16)
-
-#define WIN0_SCL_FACTOR_CBR (0x0058)
-#define v_WIN0_HS_FACTOR_CBR(x) (((x)&0xffff)<<0)
-#define v_WIN0_VS_FACTOR_CBR(x) (((x)&0xffff)<<16)
-#define m_WIN0_HS_FACTOR_CBR (0xffff<<0)
-#define m_WIN0_VS_FACTOR_CBR ((u32)0xffff<<16)
-
-#define WIN0_SCL_OFFSET (0x005c)
-#define v_WIN0_HS_OFFSET_YRGB(x) (((x)&0xff)<<0)
-#define v_WIN0_HS_OFFSET_CBR(x) (((x)&0xff)<<8)
-#define v_WIN0_VS_OFFSET_YRGB(x) (((x)&0xff)<<16)
-#define v_WIN0_VS_OFFSET_CBR(x) (((x)&0xff)<<24)
-
-#define m_WIN0_HS_OFFSET_YRGB (0xff<<0)
-#define m_WIN0_HS_OFFSET_CBR (0xff<<8)
-#define m_WIN0_VS_OFFSET_YRGB (0xff<<16)
-#define m_WIN0_VS_OFFSET_CBR ((u32)0xff<<24)
-
-#define WIN0_SRC_ALPHA_CTRL (0x0060)
-#define v_WIN0_SRC_ALPHA_EN(x) (((x)&1)<<0)
-#define v_WIN0_SRC_COLOR_M0(x) (((x)&1)<<1)
-#define v_WIN0_SRC_ALPHA_M0(x) (((x)&1)<<2)
-#define v_WIN0_SRC_BLEND_M0(x) (((x)&3)<<3)
-#define v_WIN0_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
-#define v_WIN0_SRC_FACTOR_M0(x) (((x)&7)<<6)
-#define v_WIN0_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
-#define v_WIN0_FADING_VALUE(x) (((x)&0xff)<<24)
-
-#define m_WIN0_SRC_ALPHA_EN (1<<0)
-#define m_WIN0_SRC_COLOR_M0 (1<<1)
-#define m_WIN0_SRC_ALPHA_M0 (1<<2)
-#define m_WIN0_SRC_BLEND_M0 (3<<3)
-#define m_WIN0_SRC_ALPHA_CAL_M0 (1<<5)
-#define m_WIN0_SRC_FACTOR_M0 (7<<6)
-#define m_WIN0_SRC_GLOBAL_ALPHA (0xff<<16)
-#define m_WIN0_FADING_VALUE (0xff<<24)
-
-#define WIN0_DST_ALPHA_CTRL (0x0064)
-#define v_WIN0_DST_FACTOR_M0(x) (((x)&7)<<6)
-#define m_WIN0_DST_FACTOR_M0 (7<<6)
-
-#define WIN0_FADING_CTRL (0x0068)
-#define v_WIN0_FADING_OFFSET_R(x) (((x)&0xff)<<0)
-#define v_WIN0_FADING_OFFSET_G(x) (((x)&0xff)<<8)
-#define v_WIN0_FADING_OFFSET_B(x) (((x)&0xff)<<16)
-#define v_WIN0_FADING_EN(x) (((x)&1)<<24)
-
-#define m_WIN0_FADING_OFFSET_R (0xff<<0)
-#define m_WIN0_FADING_OFFSET_G (0xff<<8)
-#define m_WIN0_FADING_OFFSET_B (0xff<<16)
-#define m_WIN0_FADING_EN (1<<24)
-
-/*win1 register*/
-#define WIN1_CTRL0 (0x0070)
-#define v_WIN1_EN(x) (((x)&1)<<0)
-#define v_WIN1_DATA_FMT(x) (((x)&7)<<1)
-#define v_WIN1_FMT_10(x) (((x)&1)<<4)
-#define v_WIN1_LB_MODE(x) (((x)&7)<<5)
-#define v_WIN1_INTERLACE_READ_MODE(x) (((x)&1)<<8)
-#define v_WIN1_NO_OUTSTANDING(x) (((x)&1)<<9)
-#define v_WIN1_CSC_MODE(x) (((x)&3)<<10)
-#define v_WIN1_RB_SWAP(x) (((x)&1)<<12)
-#define v_WIN1_ALPHA_SWAP(x) (((x)&1)<<13)
-#define v_WIN1_MID_SWAP(x) (((x)&1)<<14)
-#define v_WIN1_UV_SWAP(x) (((x)&1)<<15)
-#define v_WIN1_PPAS_ZERO_EN(x) (((x)&1)<<16)
-#define v_WIN1_YRGB_DEFLICK(x) (((x)&1)<<18)
-#define v_WIN1_CBR_DEFLICK(x) (((x)&1)<<19)
-#define v_WIN1_YUV_CLIP(x) (((x)&1)<<20)
-
-#define m_WIN1_EN (1<<0)
-#define m_WIN1_DATA_FMT (7<<1)
-#define m_WIN1_FMT_10 (1<<4)
-#define m_WIN1_LB_MODE (3<<5)
-#define m_WIN1_INTERLACE_READ_MODE (1<<8)
-#define m_WIN1_NO_OUTSTANDING (1<<9)
-#define m_WIN1_CSC_MODE (3<<10)
-#define m_WIN1_RB_SWAP (1<<12)
-#define m_WIN1_ALPHA_SWAP (1<<13)
-#define m_WIN1_MID_SWAP (1<<14)
-#define m_WIN1_UV_SWAP (1<<15)
-#define m_WIN1_PPAS_ZERO_EN (1<<16)
-#define m_WIN1_YRGB_DEFLICK (1<<18)
-#define m_WIN1_CBR_DEFLICK (1<<19)
-#define m_WIN1_YUV_CLIP (1<<20)
-
-#define WIN1_CTRL1 (0x0074)
-#define v_WIN1_YRGB_AXI_GATHER_EN(x) (((x)&1)<<0)
-#define v_WIN1_CBR_AXI_GATHER_EN(x) (((x)&1)<<1)
-#define v_WIN1_BIC_COE_SEL(x) (((x)&3)<<2)
-#define v_WIN1_VSD_YRGB_GT4(x) (((x)&1)<<4)
-#define v_WIN1_VSD_YRGB_GT2(x) (((x)&1)<<5)
-#define v_WIN1_VSD_CBR_GT4(x) (((x)&1)<<6)
-#define v_WIN1_VSD_CBR_GT2(x) (((x)&1)<<7)
-#define v_WIN1_YRGB_AXI_GATHER_NUM(x) (((x)&0xf)<<8)
-#define v_WIN1_CBR_AXI_GATHER_NUM(x) (((x)&7)<<12)
-#define v_WIN1_LINE_LOAD_MODE(x) (((x)&1)<<15)
-#define v_WIN1_YRGB_HOR_SCL_MODE(x) (((x)&3)<<16)
-#define v_WIN1_YRGB_VER_SCL_MODE(x) (((x)&3)<<18)
-#define v_WIN1_YRGB_HSD_MODE(x) (((x)&3)<<20)
-#define v_WIN1_YRGB_VSU_MODE(x) (((x)&1)<<22)
-#define v_WIN1_YRGB_VSD_MODE(x) (((x)&1)<<23)
-#define v_WIN1_CBR_HOR_SCL_MODE(x) (((x)&3)<<24)
-#define v_WIN1_CBR_VER_SCL_MODE(x) (((x)&3)<<26)
-#define v_WIN1_CBR_HSD_MODE(x) (((x)&3)<<28)
-#define v_WIN1_CBR_VSU_MODE(x) (((x)&1)<<30)
-#define v_WIN1_CBR_VSD_MODE(x) (((x)&1)<<31)
-
-#define m_WIN1_YRGB_AXI_GATHER_EN (1<<0)
-#define m_WIN1_CBR_AXI_GATHER_EN (1<<1)
-#define m_WIN1_BIC_COE_SEL (3<<2)
-#define m_WIN1_VSD_YRGB_GT4 (1<<4)
-#define m_WIN1_VSD_YRGB_GT2 (1<<5)
-#define m_WIN1_VSD_CBR_GT4 (1<<6)
-#define m_WIN1_VSD_CBR_GT2 (1<<7)
-#define m_WIN1_YRGB_AXI_GATHER_NUM (0xf<<8)
-#define m_WIN1_CBR_AXI_GATHER_NUM (7<<12)
-#define m_WIN1_LINE_LOAD_MODE (1<<15)
-#define m_WIN1_YRGB_HOR_SCL_MODE (3<<16)
-#define m_WIN1_YRGB_VER_SCL_MODE (3<<18)
-#define m_WIN1_YRGB_HSD_MODE (3<<20)
-#define m_WIN1_YRGB_VSU_MODE (1<<22)
-#define m_WIN1_YRGB_VSD_MODE (1<<23)
-#define m_WIN1_CBR_HOR_SCL_MODE (3<<24)
-#define m_WIN1_CBR_VER_SCL_MODE (3<<26)
-#define m_WIN1_CBR_HSD_MODE (3<<28)
-#define m_WIN1_CBR_VSU_MODE (1<<30)
-#define m_WIN1_CBR_VSD_MODE ((u32)1<<31)
-
-#define WIN1_COLOR_KEY (0x0078)
-#define v_WIN1_COLOR_KEY(x) (((x)&0x3fffffff)<<0)
-#define v_WIN1_COLOR_KEY_EN(x) (((x)&1)<<31)
-#define m_WIN1_COLOR_KEY (0x3fffffff<<0)
-#define m_WIN1_COLOR_KEY_EN ((u32)1<<31)
-
-#define WIN1_VIR (0x007c)
-#define v_WIN1_VIR_STRIDE(x) (((x)&0x3fff)<<0)
-#define v_WIN1_VIR_STRIDE_UV(x) (((x)&0x3fff)<<16)
-#define m_WIN1_VIR_STRIDE (0x3fff<<0)
-#define m_WIN1_VIR_STRIDE_UV (0x3fff<<16)
-
-#define WIN1_YRGB_MST (0x0080)
-#define WIN1_CBR_MST (0x0084)
-#define WIN1_ACT_INFO (0x0088)
-#define v_WIN1_ACT_WIDTH(x) (((x-1)&0x1fff)<<0)
-#define v_WIN1_ACT_HEIGHT(x) (((x-1)&0x1fff)<<16)
-#define m_WIN1_ACT_WIDTH (0x1fff<<0)
-#define m_WIN1_ACT_HEIGHT (0x1fff<<16)
-
-#define WIN1_DSP_INFO (0x008c)
-#define v_WIN1_DSP_WIDTH(x) (((x-1)&0xfff)<<0)
-#define v_WIN1_DSP_HEIGHT(x) (((x-1)&0xfff)<<16)
-#define m_WIN1_DSP_WIDTH (0xfff<<0)
-#define m_WIN1_DSP_HEIGHT (0xfff<<16)
-
-#define WIN1_DSP_ST (0x0090)
-#define v_WIN1_DSP_XST(x) (((x)&0x1fff)<<0)
-#define v_WIN1_DSP_YST(x) (((x)&0x1fff)<<16)
-#define m_WIN1_DSP_XST (0x1fff<<0)
-#define m_WIN1_DSP_YST (0x1fff<<16)
-
-#define WIN1_SCL_FACTOR_YRGB (0x0094)
-#define v_WIN1_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
-#define v_WIN1_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
-#define m_WIN1_HS_FACTOR_YRGB (0xffff<<0)
-#define m_WIN1_VS_FACTOR_YRGB ((u32)0xffff<<16)
-
-#define WIN1_SCL_FACTOR_CBR (0x0098)
-#define v_WIN1_HS_FACTOR_CBR(x) (((x)&0xffff)<<0)
-#define v_WIN1_VS_FACTOR_CBR(x) (((x)&0xffff)<<16)
-#define m_WIN1_HS_FACTOR_CBR (0xffff<<0)
-#define m_WIN1_VS_FACTOR_CBR ((u32)0xffff<<16)
-
-#define WIN1_SCL_OFFSET (0x009c)
-#define v_WIN1_HS_OFFSET_YRGB(x) (((x)&0xff)<<0)
-#define v_WIN1_HS_OFFSET_CBR(x) (((x)&0xff)<<8)
-#define v_WIN1_VS_OFFSET_YRGB(x) (((x)&0xff)<<16)
-#define v_WIN1_VS_OFFSET_CBR(x) (((x)&0xff)<<24)
-
-#define m_WIN1_HS_OFFSET_YRGB (0xff<<0)
-#define m_WIN1_HS_OFFSET_CBR (0xff<<8)
-#define m_WIN1_VS_OFFSET_YRGB (0xff<<16)
-#define m_WIN1_VS_OFFSET_CBR ((u32)0xff<<24)
-
-#define WIN1_SRC_ALPHA_CTRL (0x00a0)
-#define v_WIN1_SRC_ALPHA_EN(x) (((x)&1)<<0)
-#define v_WIN1_SRC_COLOR_M0(x) (((x)&1)<<1)
-#define v_WIN1_SRC_ALPHA_M0(x) (((x)&1)<<2)
-#define v_WIN1_SRC_BLEND_M0(x) (((x)&3)<<3)
-#define v_WIN1_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
-#define v_WIN1_SRC_FACTOR_M0(x) (((x)&7)<<6)
-#define v_WIN1_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
-#define v_WIN1_FADING_VALUE(x) (((x)&0xff)<<24)
-
-#define m_WIN1_SRC_ALPHA_EN (1<<0)
-#define m_WIN1_SRC_COLOR_M0 (1<<1)
-#define m_WIN1_SRC_ALPHA_M0 (1<<2)
-#define m_WIN1_SRC_BLEND_M0 (3<<3)
-#define m_WIN1_SRC_ALPHA_CAL_M0 (1<<5)
-#define m_WIN1_SRC_FACTOR_M0 (7<<6)
-#define m_WIN1_SRC_GLOBAL_ALPHA (0xff<<16)
-#define m_WIN1_FADING_VALUE (0xff<<24)
-
-#define WIN1_DST_ALPHA_CTRL (0x00a4)
-#define v_WIN1_DST_FACTOR_M0(x) (((x)&7)<<6)
-#define m_WIN1_DST_FACTOR_M0 (7<<6)
-
-#define WIN1_FADING_CTRL (0x00a8)
-#define v_WIN1_FADING_OFFSET_R(x) (((x)&0xff)<<0)
-#define v_WIN1_FADING_OFFSET_G(x) (((x)&0xff)<<8)
-#define v_WIN1_FADING_OFFSET_B(x) (((x)&0xff)<<16)
-#define v_WIN1_FADING_EN(x) (((x)&1)<<24)
-
-#define m_WIN1_FADING_OFFSET_R (0xff<<0)
-#define m_WIN1_FADING_OFFSET_G (0xff<<8)
-#define m_WIN1_FADING_OFFSET_B (0xff<<16)
-#define m_WIN1_FADING_EN (1<<24)
-
-/*win2 register*/
-#define WIN2_CTRL0 (0x00b0)
-#define v_WIN2_EN(x) (((x)&1)<<0)
-#define v_WIN2_DATA_FMT(x) (((x)&7)<<1)
-#define v_WIN2_MST0_EN(x) (((x)&1)<<4)
-#define v_WIN2_MST1_EN(x) (((x)&1)<<5)
-#define v_WIN2_MST2_EN(x) (((x)&1)<<6)
-#define v_WIN2_MST3_EN(x) (((x)&1)<<7)
-#define v_WIN2_INTERLACE_READ(x) (((x)&1)<<8)
-#define v_WIN2_NO_OUTSTANDING(x) (((x)&1)<<9)
-#define v_WIN2_CSC_MODE(x) (((x)&1)<<10)
-#define v_WIN2_RB_SWAP(x) (((x)&1)<<12)
-#define v_WIN2_ALPHA_SWAP(x) (((x)&1)<<13)
-#define v_WIN2_ENDIAN_MODE(x) (((x)&1)<<14)
-#define v_WIN2_LUT_EN(x) (((x)&1)<<18)
-
-#define m_WIN2_EN (1<<0)
-#define m_WIN2_DATA_FMT (7<<1)
-#define m_WIN2_MST0_EN (1<<4)
-#define m_WIN2_MST1_EN (1<<5)
-#define m_WIN2_MST2_EN (1<<6)
-#define m_WIN2_MST3_EN (1<<7)
-#define m_WIN2_INTERLACE_READ (1<<8)
-#define m_WIN2_NO_OUTSTANDING (1<<9)
-#define m_WIN2_CSC_MODE (1<<10)
-#define m_WIN2_RB_SWAP (1<<12)
-#define m_WIN2_ALPHA_SWAP (1<<13)
-#define m_WIN2_ENDIAN_MODE (1<<14)
-#define m_WIN2_LUT_EN (1<<18)
-
-#define WIN2_CTRL1 (0x00b4)
-#define v_WIN2_AXI_GATHER_EN(x) (((x)&1)<<0)
-#define v_WIN2_AXI_GATHER_NUM(x) (((x)&0xf)<<4)
-#define m_WIN2_AXI_GATHER_EN (1<<0)
-#define m_WIN2_AXI_GATHER_NUM (0xf<<4)
-
-#define WIN2_VIR0_1 (0x00b8)
-#define v_WIN2_VIR_STRIDE0(x) (((x)&0x1fff)<<0)
-#define v_WIN2_VIR_STRIDE1(x) (((x)&0x1fff)<<16)
-#define m_WIN2_VIR_STRIDE0 (0x1fff<<0)
-#define m_WIN2_VIR_STRIDE1 (0x1fff<<16)
-
-#define WIN2_VIR2_3 (0x00bc)
-#define v_WIN2_VIR_STRIDE2(x) (((x)&0x1fff)<<0)
-#define v_WIN2_VIR_STRIDE3(x) (((x)&0x1fff)<<16)
-#define m_WIN2_VIR_STRIDE2 (0x1fff<<0)
-#define m_WIN2_VIR_STRIDE3 (0x1fff<<16)
-
-#define WIN2_MST0 (0x00c0)
-#define WIN2_DSP_INFO0 (0x00c4)
-#define v_WIN2_DSP_WIDTH0(x) (((x-1)&0xfff)<<0)
-#define v_WIN2_DSP_HEIGHT0(x) (((x-1)&0xfff)<<16)
-#define m_WIN2_DSP_WIDTH0 (0xfff<<0)
-#define m_WIN2_DSP_HEIGHT0 (0xfff<<16)
-
-#define WIN2_DSP_ST0 (0x00c8)
-#define v_WIN2_DSP_XST0(x) (((x)&0x1fff)<<0)
-#define v_WIN2_DSP_YST0(x) (((x)&0x1fff)<<16)
-#define m_WIN2_DSP_XST0 (0x1fff<<0)
-#define m_WIN2_DSP_YST0 (0x1fff<<16)
-
-#define WIN2_COLOR_KEY (0x00cc)
-#define v_WIN2_COLOR_KEY(x) (((x)&0xffffff)<<0)
-#define v_WIN2_KEY_EN(x) (((x)&1)<<24)
-#define m_WIN2_COLOR_KEY (0xffffff<<0)
-#define m_WIN2_KEY_EN ((u32)1<<24)
-
-
-#define WIN2_MST1 (0x00d0)
-#define WIN2_DSP_INFO1 (0x00d4)
-#define v_WIN2_DSP_WIDTH1(x) (((x-1)&0xfff)<<0)
-#define v_WIN2_DSP_HEIGHT1(x) (((x-1)&0xfff)<<16)
-
-#define m_WIN2_DSP_WIDTH1 (0xfff<<0)
-#define m_WIN2_DSP_HEIGHT1 (0xfff<<16)
-
-#define WIN2_DSP_ST1 (0x00d8)
-#define v_WIN2_DSP_XST1(x) (((x)&0x1fff)<<0)
-#define v_WIN2_DSP_YST1(x) (((x)&0x1fff)<<16)
-
-#define m_WIN2_DSP_XST1 (0x1fff<<0)
-#define m_WIN2_DSP_YST1 (0x1fff<<16)
-
-#define WIN2_SRC_ALPHA_CTRL (0x00dc)
-#define v_WIN2_SRC_ALPHA_EN(x) (((x)&1)<<0)
-#define v_WIN2_SRC_COLOR_M0(x) (((x)&1)<<1)
-#define v_WIN2_SRC_ALPHA_M0(x) (((x)&1)<<2)
-#define v_WIN2_SRC_BLEND_M0(x) (((x)&3)<<3)
-#define v_WIN2_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
-#define v_WIN2_SRC_FACTOR_M0(x) (((x)&7)<<5)
-#define v_WIN2_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
-#define v_WIN2_FADING_VALUE(x) (((x)&0xff)<<24)
-
-
-#define m_WIN2_SRC_ALPHA_EN (1<<0)
-#define m_WIN2_SRC_COLOR_M0 (1<<1)
-#define m_WIN2_SRC_ALPHA_M0 (1<<2)
-#define m_WIN2_SRC_BLEND_M0 (3<<3)
-#define m_WIN2_SRC_ALPHA_CAL_M0 (1<<5)
-#define m_WIN2_SRC_FACTOR_M0 (7<<6)
-#define m_WIN2_SRC_GLOBAL_ALPHA (0xff<<16)
-#define m_WIN2_FADING_VALUE (0xff<<24)
-
-#define WIN2_MST2 (0x00e0)
-#define WIN2_DSP_INFO2 (0x00e4)
-#define v_WIN2_DSP_WIDTH2(x) (((x-1)&0xfff)<<0)
-#define v_WIN2_DSP_HEIGHT2(x) (((x-1)&0xfff)<<16)
-
-#define m_WIN2_DSP_WIDTH2 (0xfff<<0)
-#define m_WIN2_DSP_HEIGHT2 (0xfff<<16)
-
-
-#define WIN2_DSP_ST2 (0x00e8)
-#define v_WIN2_DSP_XST2(x) (((x)&0x1fff)<<0)
-#define v_WIN2_DSP_YST2(x) (((x)&0x1fff)<<16)
-#define m_WIN2_DSP_XST2 (0x1fff<<0)
-#define m_WIN2_DSP_YST2 (0x1fff<<16)
-
-#define WIN2_DST_ALPHA_CTRL (0x00ec)
-#define v_WIN2_DST_FACTOR_M0(x) (((x)&7)<<6)
-#define m_WIN2_DST_FACTOR_M0 (7<<6)
-
-#define WIN2_MST3 (0x00f0)
-#define WIN2_DSP_INFO3 (0x00f4)
-#define v_WIN2_DSP_WIDTH3(x) (((x-1)&0xfff)<<0)
-#define v_WIN2_DSP_HEIGHT3(x) (((x-1)&0xfff)<<16)
-#define m_WIN2_DSP_WIDTH3 (0xfff<<0)
-#define m_WIN2_DSP_HEIGHT3 (0xfff<<16)
-
-#define WIN2_DSP_ST3 (0x00f8)
-#define v_WIN2_DSP_XST3(x) (((x)&0x1fff)<<0)
-#define v_WIN2_DSP_YST3(x) (((x)&0x1fff)<<16)
-#define m_WIN2_DSP_XST3 (0x1fff<<0)
-#define m_WIN2_DSP_YST3 (0x1fff<<16)
-
-#define WIN2_FADING_CTRL (0x00fc)
-#define v_WIN2_FADING_OFFSET_R(x) (((x)&0xff)<<0)
-#define v_WIN2_FADING_OFFSET_G(x) (((x)&0xff)<<8)
-#define v_WIN2_FADING_OFFSET_B(x) (((x)&0xff)<<16)
-#define v_WIN2_FADING_EN(x) (((x)&1)<<24)
-
-#define m_WIN2_FADING_OFFSET_R (0xff<<0)
-#define m_WIN2_FADING_OFFSET_G (0xff<<8)
-#define m_WIN2_FADING_OFFSET_B (0xff<<16)
-#define m_WIN2_FADING_EN (1<<24)
-
-/*win3 register*/
-#define WIN3_CTRL0 (0x0100)
-#define v_WIN3_EN(x) (((x)&1)<<0)
-#define v_WIN3_DATA_FMT(x) (((x)&7)<<1)
-#define v_WIN3_MST0_EN(x) (((x)&1)<<4)
-#define v_WIN3_MST1_EN(x) (((x)&1)<<5)
-#define v_WIN3_MST2_EN(x) (((x)&1)<<6)
-#define v_WIN3_MST3_EN(x) (((x)&1)<<7)
-#define v_WIN3_INTERLACE_READ(x) (((x)&1)<<8)
-#define v_WIN3_NO_OUTSTANDING(x) (((x)&1)<<9)
-#define v_WIN3_CSC_MODE(x) (((x)&1)<<10)
-#define v_WIN3_RB_SWAP(x) (((x)&1)<<12)
-#define v_WIN3_ALPHA_SWAP(x) (((x)&1)<<13)
-#define v_WIN3_ENDIAN_MODE(x) (((x)&1)<<14)
-#define v_WIN3_LUT_EN(x) (((x)&1)<<18)
-
-#define m_WIN3_EN (1<<0)
-#define m_WIN3_DATA_FMT (7<<1)
-#define m_WIN3_MST0_EN (1<<4)
-#define m_WIN3_MST1_EN (1<<5)
-#define m_WIN3_MST2_EN (1<<6)
-#define m_WIN3_MST3_EN (1<<7)
-#define m_WIN3_INTERLACE_READ (1<<8)
-#define m_WIN3_NO_OUTSTANDING (1<<9)
-#define m_WIN3_CSC_MODE (1<<10)
-#define m_WIN3_RB_SWAP (1<<12)
-#define m_WIN3_ALPHA_SWAP (1<<13)
-#define m_WIN3_ENDIAN_MODE (1<<14)
-#define m_WIN3_LUT_EN (1<<18)
-
-
-#define WIN3_CTRL1 (0x0104)
-#define v_WIN3_AXI_GATHER_EN(x) (((x)&1)<<0)
-#define v_WIN3_AXI_GATHER_NUM(x) (((x)&0xf)<<4)
-#define m_WIN3_AXI_GATHER_EN (1<<0)
-#define m_WIN3_AXI_GATHER_NUM (0xf<<4)
-
-#define WIN3_VIR0_1 (0x0108)
-#define v_WIN3_VIR_STRIDE0(x) (((x)&0x1fff)<<0)
-#define v_WIN3_VIR_STRIDE1(x) (((x)&0x1fff)<<16)
-#define m_WIN3_VIR_STRIDE0 (0x1fff<<0)
-#define m_WIN3_VIR_STRIDE1 (0x1fff<<16)
-
-#define WIN3_VIR2_3 (0x010c)
-#define v_WIN3_VIR_STRIDE2(x) (((x)&0x1fff)<<0)
-#define v_WIN3_VIR_STRIDE3(x) (((x)&0x1fff)<<16)
-#define m_WIN3_VIR_STRIDE2 (0x1fff<<0)
-#define m_WIN3_VIR_STRIDE3 (0x1fff<<16)
-
-#define WIN3_MST0 (0x0110)
-#define WIN3_DSP_INFO0 (0x0114)
-#define v_WIN3_DSP_WIDTH0(x) (((x-1)&0xfff)<<0)
-#define v_WIN3_DSP_HEIGHT0(x) (((x-1)&0xfff)<<16)
-#define m_WIN3_DSP_WIDTH0 (0xfff<<0)
-#define m_WIN3_DSP_HEIGHT0 (0xfff<<16)
-
-#define WIN3_DSP_ST0 (0x0118)
-#define v_WIN3_DSP_XST0(x) (((x)&0x1fff)<<0)
-#define v_WIN3_DSP_YST0(x) (((x)&0x1fff)<<16)
-#define m_WIN3_DSP_XST0 (0x1fff<<0)
-#define m_WIN3_DSP_YST0 (0x1fff<<16)
-
-#define WIN3_COLOR_KEY (0x011c)
-#define v_WIN3_COLOR_KEY(x) (((x)&0xffffff)<<0)
-#define v_WIN3_KEY_EN(x) (((x)&1)<<24)
-#define m_WIN3_COLOR_KEY (0xffffff<<0)
-#define m_WIN3_KEY_EN ((u32)1<<24)
-
-#define WIN3_MST1 (0x0120)
-#define WIN3_DSP_INFO1 (0x0124)
-#define v_WIN3_DSP_WIDTH1(x) (((x-1)&0xfff)<<0)
-#define v_WIN3_DSP_HEIGHT1(x) (((x-1)&0xfff)<<16)
-#define m_WIN3_DSP_WIDTH1 (0xfff<<0)
-#define m_WIN3_DSP_HEIGHT1 (0xfff<<16)
-
-#define WIN3_DSP_ST1 (0x0128)
-#define v_WIN3_DSP_XST1(x) (((x)&0x1fff)<<0)
-#define v_WIN3_DSP_YST1(x) (((x)&0x1fff)<<16)
-#define m_WIN3_DSP_XST1 (0x1fff<<0)
-#define m_WIN3_DSP_YST1 (0x1fff<<16)
-
-#define WIN3_SRC_ALPHA_CTRL (0x012c)
-#define v_WIN3_SRC_ALPHA_EN(x) (((x)&1)<<0)
-#define v_WIN3_SRC_COLOR_M0(x) (((x)&1)<<1)
-#define v_WIN3_SRC_ALPHA_M0(x) (((x)&1)<<2)
-#define v_WIN3_SRC_BLEND_M0(x) (((x)&3)<<3)
-#define v_WIN3_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
-#define v_WIN3_SRC_FACTOR_M0(x) (((x)&7)<<6)
-#define v_WIN3_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
-#define v_WIN3_FADING_VALUE(x) (((x)&0xff)<<24)
-
-#define m_WIN3_SRC_ALPHA_EN (1<<0)
-#define m_WIN3_SRC_COLOR_M0 (1<<1)
-#define m_WIN3_SRC_ALPHA_M0 (1<<2)
-#define m_WIN3_SRC_BLEND_M0 (3<<3)
-#define m_WIN3_SRC_ALPHA_CAL_M0 (1<<5)
-#define m_WIN3_SRC_FACTOR_M0 (7<<6)
-#define m_WIN3_SRC_GLOBAL_ALPHA (0xff<<16)
-#define m_WIN3_FADING_VALUE (0xff<<24)
-
-#define WIN3_MST2 (0x0130)
-#define WIN3_DSP_INFO2 (0x0134)
-#define v_WIN3_DSP_WIDTH2(x) (((x-1)&0xfff)<<0)
-#define v_WIN3_DSP_HEIGHT2(x) (((x-1)&0xfff)<<16)
-#define m_WIN3_DSP_WIDTH2 (0xfff<<0)
-#define m_WIN3_DSP_HEIGHT2 (0xfff<<16)
-
-#define WIN3_DSP_ST2 (0x0138)
-#define v_WIN3_DSP_XST2(x) (((x)&0x1fff)<<0)
-#define v_WIN3_DSP_YST2(x) (((x)&0x1fff)<<16)
-#define m_WIN3_DSP_XST2 (0x1fff<<0)
-#define m_WIN3_DSP_YST2 (0x1fff<<16)
-
-#define WIN3_DST_ALPHA_CTRL (0x013c)
-#define v_WIN3_DST_FACTOR_M0(x) (((x)&7)<<6)
-#define m_WIN3_DST_FACTOR_M0 (7<<6)
-
-
-#define WIN3_MST3 (0x0140)
-#define WIN3_DSP_INFO3 (0x0144)
-#define v_WIN3_DSP_WIDTH3(x) (((x-1)&0xfff)<<0)
-#define v_WIN3_DSP_HEIGHT3(x) (((x-1)&0xfff)<<16)
-#define m_WIN3_DSP_WIDTH3 (0xfff<<0)
-#define m_WIN3_DSP_HEIGHT3 (0xfff<<16)
-
-#define WIN3_DSP_ST3 (0x0148)
-#define v_WIN3_DSP_XST3(x) (((x)&0x1fff)<<0)
-#define v_WIN3_DSP_YST3(x) (((x)&0x1fff)<<16)
-#define m_WIN3_DSP_XST3 (0x1fff<<0)
-#define m_WIN3_DSP_YST3 (0x1fff<<16)
-
-#define WIN3_FADING_CTRL (0x014c)
-#define v_WIN3_FADING_OFFSET_R(x) (((x)&0xff)<<0)
-#define v_WIN3_FADING_OFFSET_G(x) (((x)&0xff)<<8)
-#define v_WIN3_FADING_OFFSET_B(x) (((x)&0xff)<<16)
-#define v_WIN3_FADING_EN(x) (((x)&1)<<24)
-
-#define m_WIN3_FADING_OFFSET_R (0xff<<0)
-#define m_WIN3_FADING_OFFSET_G (0xff<<8)
-#define m_WIN3_FADING_OFFSET_B (0xff<<16)
-#define m_WIN3_FADING_EN (1<<24)
-
-
-/*hwc register*/
-#define HWC_CTRL0 (0x0150)
-#define v_HWC_EN(x) (((x)&1)<<0)
-#define v_HWC_DATA_FMT(x) (((x)&7)<<1)
-#define v_HWC_MODE(x) (((x)&1)<<4)
-#define v_HWC_SIZE(x) (((x)&3)<<5)
-#define v_HWC_INTERLACE_READ(x) (((x)&1)<<8)
-#define v_HWC_NO_OUTSTANDING(x) (((x)&1)<<9)
-#define v_HWC_CSC_MODE(x) (((x)&1)<<10)
-#define v_HWC_RB_SWAP(x) (((x)&1)<<12)
-#define v_HWC_ALPHA_SWAP(x) (((x)&1)<<13)
-#define v_HWC_ENDIAN_MODE(x) (((x)&1)<<14)
-#define v_HWC_LUT_EN(x) (((x)&1)<<18)
-
-#define m_HWC_EN (1<<0)
-#define m_HWC_DATA_FMT (7<<1)
-#define m_HWC_MODE (1<<4)
-#define m_HWC_SIZE (3<<5)
-#define m_HWC_INTERLACE_READ (1<<8)
-#define m_HWC_NO_OUTSTANDING (1<<9)
-#define m_HWC_CSC_MODE (1<<10)
-#define m_HWC_RB_SWAP (1<<12)
-#define m_HWC_ALPHA_SWAP (1<<13)
-#define m_HWC_ENDIAN_MODE (1<<14)
-#define m_HWC_LUT_EN (1<<18)
-
-
-#define HWC_CTRL1 (0x0154)
-#define v_HWC_AXI_GATHER_EN(x) (((x)&1)<<0)
-#define v_HWC_AXI_GATHER_NUM(x) (((x)&7)<<4)
-#define m_HWC_AXI_GATHER_EN (1<<0)
-#define m_HWC_AXI_GATHER_NUM (7<<4)
-
-#define HWC_MST (0x0158)
-#define HWC_DSP_ST (0x015c)
-#define v_HWC_DSP_XST3(x) (((x)&0x1fff)<<0)
-#define v_HWC_DSP_YST3(x) (((x)&0x1fff)<<16)
-#define m_HWC_DSP_XST3 (0x1fff<<0)
-#define m_HWC_DSP_YST3 (0x1fff<<16)
-
-#define HWC_SRC_ALPHA_CTRL (0x0160)
-#define v_HWC_SRC_ALPHA_EN(x) (((x)&1)<<0)
-#define v_HWC_SRC_COLOR_M0(x) (((x)&1)<<1)
-#define v_HWC_SRC_ALPHA_M0(x) (((x)&1)<<2)
-#define v_HWC_SRC_BLEND_M0(x) (((x)&3)<<3)
-#define v_HWC_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
-#define v_HWC_SRC_FACTOR_M0(x) (((x)&7)<<6)
-#define v_HWC_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
-#define v_HWC_FADING_VALUE(x) (((x)&0xff)<<24)
-
-#define m_HWC_SRC_ALPHA_EN (1<<0)
-#define m_HWC_SRC_COLOR_M0 (1<<1)
-#define m_HWC_SRC_ALPHA_M0 (1<<2)
-#define m_HWC_SRC_BLEND_M0 (3<<3)
-#define m_HWC_SRC_ALPHA_CAL_M0 (1<<5)
-#define m_HWC_SRC_FACTOR_M0 (7<<6)
-#define m_HWC_SRC_GLOBAL_ALPHA (0xff<<16)
-#define m_HWC_FADING_VALUE (0xff<<24)
-
-#define HWC_DST_ALPHA_CTRL (0x0164)
-#define v_HWC_DST_FACTOR_M0(x) (((x)&7)<<6)
-#define m_HWC_DST_FACTOR_M0 (7<<6)
-
-
-#define HWC_FADING_CTRL (0x0168)
-#define v_HWC_FADING_OFFSET_R(x) (((x)&0xff)<<0)
-#define v_HWC_FADING_OFFSET_G(x) (((x)&0xff)<<8)
-#define v_HWC_FADING_OFFSET_B(x) (((x)&0xff)<<16)
-#define v_HWC_FADING_EN(x) (((x)&1)<<24)
-
-#define m_HWC_FADING_OFFSET_R (0xff<<0)
-#define m_HWC_FADING_OFFSET_G (0xff<<8)
-#define m_HWC_FADING_OFFSET_B (0xff<<16)
-#define m_HWC_FADING_EN (1<<24)
-
-/*post process register*/
-#define POST_DSP_HACT_INFO (0x0170)
-#define v_DSP_HACT_END_POST(x) (((x)&0x1fff)<<0)
-#define v_DSP_HACT_ST_POST(x) (((x)&0x1fff)<<16)
-#define m_DSP_HACT_END_POST (0x1fff<<0)
-#define m_DSP_HACT_ST_POST (0x1fff<<16)
-
-#define POST_DSP_VACT_INFO (0x0174)
-#define v_DSP_VACT_END_POST(x) (((x)&0x1fff)<<0)
-#define v_DSP_VACT_ST_POST(x) (((x)&0x1fff)<<16)
-#define m_DSP_VACT_END_POST (0x1fff<<0)
-#define m_DSP_VACT_ST_POST (0x1fff<<16)
-
-#define POST_SCL_FACTOR_YRGB (0x0178)
-#define v_POST_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
-#define v_POST_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
-#define m_POST_HS_FACTOR_YRGB (0xffff<<0)
-#define m_POST_VS_FACTOR_YRGB (0xffff<<16)
-
-#define POST_SCL_CTRL (0x0180)
-#define v_POST_HOR_SD_EN(x) (((x)&1)<<0)
-#define v_POST_VER_SD_EN(x) (((x)&1)<<1)
-
-#define m_POST_HOR_SD_EN (0x1<<0)
-#define m_POST_VER_SD_EN (0x1<<1)
-
-#define POST_DSP_VACT_INFO_F1 (0x0184)
-#define v_DSP_VACT_END_POST_F1(x) (((x)&0x1fff)<<0)
-#define v_DSP_VACT_ST_POST_F1(x) (((x)&0x1fff)<<16)
-
-#define m_DSP_VACT_END_POST_F1 (0x1fff<<0)
-#define m_DSP_VACT_ST_POST_F1 (0x1fff<<16)
-
-#define DSP_HTOTAL_HS_END (0x0188)
-#define v_DSP_HS_PW(x) (((x)&0x1fff)<<0)
-#define v_DSP_HTOTAL(x) (((x)&0x1fff)<<16)
-#define m_DSP_HS_PW (0x1fff<<0)
-#define m_DSP_HTOTAL (0x1fff<<16)
-
-#define DSP_HACT_ST_END (0x018c)
-#define v_DSP_HACT_END(x) (((x)&0x1fff)<<0)
-#define v_DSP_HACT_ST(x) (((x)&0x1fff)<<16)
-#define m_DSP_HACT_END (0x1fff<<0)
-#define m_DSP_HACT_ST (0x1fff<<16)
-
-#define DSP_VTOTAL_VS_END (0x0190)
-#define v_DSP_VS_PW(x) (((x)&0x1fff)<<0)
-#define v_DSP_VTOTAL(x) (((x)&0x1fff)<<16)
-#define m_DSP_VS_PW (0x1fff<<0)
-#define m_DSP_VTOTAL (0x1fff<<16)
-
-#define DSP_VACT_ST_END (0x0194)
-#define v_DSP_VACT_END(x) (((x)&0x1fff)<<0)
-#define v_DSP_VACT_ST(x) (((x)&0x1fff)<<16)
-#define m_DSP_VACT_END (0x1fff<<0)
-#define m_DSP_VACT_ST (0x1fff<<16)
-
-#define DSP_VS_ST_END_F1 (0x0198)
-#define v_DSP_VS_END_F1(x) (((x)&0x1fff)<<0)
-#define v_DSP_VS_ST_F1(x) (((x)&0x1fff)<<16)
-#define m_DSP_VS_END_F1 (0x1fff<<0)
-#define m_DSP_VS_ST_F1 (0x1fff<<16)
-
-#define DSP_VACT_ST_END_F1 (0x019c)
-#define v_DSP_VACT_END_F1(x) (((x)&0x1fff)<<0)
-#define v_DSP_VAC_ST_F1(x) (((x)&0x1fff)<<16)
-#define m_DSP_VACT_END_F1 (0x1fff<<0)
-#define m_DSP_VAC_ST_F1 (0x1fff<<16)
-
-
-/*pwm register*/
-#define PWM_CTRL (0x01a0)
-#define v_PWM_EN(x) (((x)&1)<<0)
-#define v_PWM_MODE(x) (((x)&3)<<1)
-
-#define v_DUTY_POL(x) (((x)&1)<<3)
-#define v_INACTIVE_POL(x) (((x)&1)<<4)
-#define v_OUTPUT_MODE(x) (((x)&1)<<5)
-#define v_BL_EN(x) (((x)&1)<<8)
-#define v_CLK_SEL(x) (((x)&1)<<9)
-#define v_PRESCALE(x) (((x)&7)<<12)
-#define v_SCALE(x) (((x)&0xff)<<16)
-#define v_RPT(x) (((x)&0xff)<<24)
-
-#define m_PWM_EN (1<<0)
-#define m_PWM_MODE (3<<1)
-
-#define m_DUTY_POL (1<<3)
-#define m_INACTIVE_POL (1<<4)
-#define m_OUTPUT_MODE (1<<5)
-#define m_BL_EN (1<<8)
-#define m_CLK_SEL (1<<9)
-#define m_PRESCALE (7<<12)
-#define m_SCALE (0xff<<16)
-#define m_RPT ((u32)0xff<<24)
-
-#define PWM_PERIOD_HPR (0x01a4)
-#define PWM_DUTY_LPR (0x01a8)
-#define PWM_CNT (0x01ac)
-
-/*BCSH register*/
-#define BCSH_COLOR_BAR (0x01b0)
-#define v_BCSH_EN(x) (((x)&1)<<0)
-#define v_BCSH_COLOR_BAR_Y(x) (((x)&0x3ff)<<2)
-#define v_BCSH_COLOR_BAR_U(x) (((x)&0x3ff)<<12)
-#define v_BCSH_COLOR_BAR_V(x) (((x)&0x3ff)<<22)
-
-#define m_BCSH_EN (1<<0)
-#define m_BCSH_COLOR_BAR_Y (0x3ff<<2)
-#define m_BCSH_COLOR_BAR_U (0x3ff<<12)
-#define m_BCSH_COLOR_BAR_V ((u32)0x3ff<<22)
-
-#define BCSH_BCS (0x01b4)
-#define v_BCSH_BRIGHTNESS(x) (((x)&0xff)<<0)
-#define v_BCSH_CONTRAST(x) (((x)&0x1ff)<<8)
-#define v_BCSH_SAT_CON(x) (((x)&0x3ff)<<20)
-#define v_BCSH_OUT_MODE(x) (((x)&0x3)<<30)
-
-#define m_BCSH_BRIGHTNESS (0xff<<0)
-#define m_BCSH_CONTRAST (0x1ff<<8)
-#define m_BCSH_SAT_CON (0x3ff<<20)
-#define m_BCSH_OUT_MODE ((u32)0x3<<30)
-
-
-#define BCSH_H (0x01b8)
-#define v_BCSH_SIN_HUE(x) (((x)&0x1ff)<<0)
-#define v_BCSH_COS_HUE(x) (((x)&0x1ff)<<16)
-
-#define m_BCSH_SIN_HUE (0x1ff<<0)
-#define m_BCSH_COS_HUE (0x1ff<<16)
-
-#define CABC_CTRL0 (0x01c0)
-#define v_CABC_EN(x) (((x)&1)<<0)
-#define v_CABC_CALC_PIXEL_NUM(x) (((x)&0x7fffff)<<1)
-#define v_CABC_STAGE_UP(x) (((x)&0xff)<<24)
-#define m_CABC_EN (1<<0)
-#define m_CABC_CALC_PIXEL_NUM (0x7fffff<<1)
-#define m_CABC_STAGE_UP (0xff<<24)
-
-
-#define CABC_CTRL1 (0x01c4)
-#define v_CABC_TOTAL_NUM(x) (((x)&0x7fffff)<<1)
-#define v_CABC_STAGE_DOWN(x) (((x)&0xff)<<24)
-#define m_CABC_TOTAL_NUM (0x7fffff<<1)
-#define m_CABC_STAGE_DOWN (0xff<<24)
-
-#define CABC_GAUSS_LINE0_0 (0x01c8)
-#define v_CABC_T_LINE0_0(x) (((x)&0xff)<<0)
-#define v_CABC_T_LINE0_1(x) (((x)&0xff)<<8)
-#define v_CABC_T_LINE0_2(x) (((x)&0xff)<<16)
-#define v_CABC_T_LINE0_3(x) (((x)&0xff)<<24)
-#define m_CABC_T_LINE0_0 (0xff<<0)
-#define m_CABC_T_LINE0_1 (0xff<<8)
-#define m_CABC_T_LINE0_2 (0xff<<16)
-#define m_CABC_T_LINE0_3 ((u32)0xff<<24)
-
-#define CABC_GAUSS_LINE0_1 (0x01cc)
-#define v_CABC_T_LINE0_4(x) (((x)&0xff)<<0)
-#define v_CABC_T_LINE0_5(x) (((x)&0xff)<<8)
-#define v_CABC_T_LINE0_6(x) (((x)&0xff)<<16)
-#define m_CABC_T_LINE0_4 (0xff<<0)
-#define m_CABC_T_LINE0_5 (0xff<<8)
-#define m_CABC_T_LINE0_6 (0xff<<16)
-
-
-#define CABC_GAUSS_LINE1_0 (0x01d0)
-#define v_CABC_T_LINE1_0(x) (((x)&0xff)<<0)
-#define v_CABC_T_LINE1_1(x) (((x)&0xff)<<8)
-#define v_CABC_T_LINE1_2(x) (((x)&0xff)<<16)
-#define v_CABC_T_LINE1_3(x) (((x)&0xff)<<24)
-#define m_CABC_T_LINE1_0 (0xff<<0)
-#define m_CABC_T_LINE1_1 (0xff<<8)
-#define m_CABC_T_LINE1_2 (0xff<<16)
-#define m_CABC_T_LINE1_3 ((u32)0xff<<24)
-
-#define CABC_GAUSS_LINE1_1 (0x01d4)
-#define v_CABC_T_LINE1_4(x) (((x)&0xff)<<0)
-#define v_CABC_T_LINE1_5(x) (((x)&0xff)<<8)
-#define v_CABC_T_LINE1_6(x) (((x)&0xff)<<16)
-#define m_CABC_T_LINE1_4 (0xff<<0)
-#define m_CABC_T_LINE1_5 (0xff<<8)
-#define m_CABC_T_LINE1_6 (0xff<<16)
-
-#define CABC_GAUSS_LINE2_0 (0x01d8)
-#define v_CABC_T_LINE2_0(x) (((x)&0xff)<<0)
-#define v_CABC_T_LINE2_1(x) (((x)&0xff)<<8)
-#define v_CABC_T_LINE2_2(x) (((x)&0xff)<<16)
-#define v_CABC_T_LINE2_3(x) (((x)&0xff)<<24)
-#define m_CABC_T_LINE2_0 (0xff<<0)
-#define m_CABC_T_LINE2_1 (0xff<<8)
-#define m_CABC_T_LINE2_2 (0xff<<16)
-#define m_CABC_T_LINE2_3 ((u32)0xff<<24)
-
-#define CABC_GAUSS_LINE2_1 (0x01dc)
-#define v_CABC_T_LINE2_4(x) (((x)&0xff)<<0)
-#define v_CABC_T_LINE2_5(x) (((x)&0xff)<<8)
-#define v_CABC_T_LINE2_6(x) (((x)&0xff)<<16)
-#define m_CABC_T_LINE2_4 (0xff<<0)
-#define m_CABC_T_LINE2_5 (0xff<<8)
-#define m_CABC_T_LINE2_6 (0xff<<16)
-
-/*FRC register*/
-#define FRC_LOWER01_0 (0x01e0)
-#define v_FRC_LOWER01_FRM0(x) (((x)&0xffff)<<0)
-#define v_FRC_LOWER01_FRM1(x) (((x)&0xffff)<<16)
-#define m_FRC_LOWER01_FRM0 (0xffff<<0)
-#define m_FRC_LOWER01_FRM1 ((u32)0xffff<<16)
-
-#define FRC_LOWER01_1 (0x01e4)
-#define v_FRC_LOWER01_FRM2(x) (((x)&0xffff)<<0)
-#define v_FRC_LOWER01_FRM3(x) (((x)&0xffff)<<16)
-#define m_FRC_LOWER01_FRM2 (0xffff<<0)
-#define m_FRC_LOWER01_FRM3 ((u32)0xffff<<16)
-
-#define FRC_LOWER10_0 (0x01e8)
-#define v_FRC_LOWER10_FRM0(x) (((x)&0xffff)<<0)
-#define v_FRC_LOWER10_FRM1(x) (((x)&0xffff)<<16)
-#define m_FRC_LOWER10_FRM0 (0xffff<<0)
-#define m_FRC_LOWER10_FRM1 ((u32)0xffff<<16)
-
-#define FRC_LOWER10_1 (0x01ec)
-#define v_FRC_LOWER10_FRM2(x) (((x)&0xffff)<<0)
-#define v_FRC_LOWER10_FRM3(x) (((x)&0xffff)<<16)
-#define m_FRC_LOWER10_FRM2 (0xffff<<0)
-#define m_FRC_LOWER10_FRM3 ((u32)0xffff<<16)
-
-#define FRC_LOWER11_0 (0x01f0)
-#define v_FRC_LOWER11_FRM0(x) (((x)&0xffff)<<0)
-#define v_FRC_LOWER11_FRM1(x) (((x)&0xffff)<<16)
-#define m_FRC_LOWER11_FRM0 (0xffff<<0)
-#define m_FRC_LOWER11_FRM1 ((u32)0xffff<<16)
-
-#define FRC_LOWER11_1 (0x01f4)
-#define v_FRC_LOWER11_FRM2(x) (((x)&0xffff)<<0)
-#define v_FRC_LOWER11_FRM3(x) (((x)&0xffff)<<16)
-#define m_FRC_LOWER11_FRM2 (0xffff<<0)
-#define m_FRC_LOWER11_FRM3 ((u32)0xffff<<16)
-
-#define MMU_DTE_ADDR (0x0300)
-#define v_MMU_DTE_ADDR(x) (((x)&0xffffffff)<<0)
-#define m_MMU_DTE_ADDR (0xffffffff<<0)
-
-#define MMU_STATUS (0x0304)
-#define v_PAGING_ENABLED(x) (((x)&1)<<0)
-#define v_PAGE_FAULT_ACTIVE(x) (((x)&1)<<1)
-#define v_STAIL_ACTIVE(x) (((x)&1)<<2)
-#define v_MMU_IDLE(x) (((x)&1)<<3)
-#define v_REPLAY_BUFFER_EMPTY(x) (((x)&1)<<4)
-#define v_PAGE_FAULT_IS_WRITE(x) (((x)&1)<<5)
-#define v_PAGE_FAULT_BUS_ID(x) (((x)&0x1f)<<6)
-#define m_PAGING_ENABLED (1<<0)
-#define m_PAGE_FAULT_ACTIVE (1<<1)
-#define m_STAIL_ACTIVE (1<<2)
-#define m_MMU_IDLE (1<<3)
-#define m_REPLAY_BUFFER_EMPTY (1<<4)
-#define m_PAGE_FAULT_IS_WRITE (1<<5)
-#define m_PAGE_FAULT_BUS_ID (0x1f<<6)
-
-#define MMU_COMMAND (0x0308)
-#define v_MMU_CMD(x) (((x)&0x3)<<0)
-#define m_MMU_CMD (0x3<<0)
-
-#define MMU_PAGE_FAULT_ADDR (0x030c)
-#define v_PAGE_FAULT_ADDR(x) (((x)&0xffffffff)<<0)
-#define m_PAGE_FAULT_ADDR (0xffffffff<<0)
-
-#define MMU_ZAP_ONE_LINE (0x0310)
-#define v_MMU_ZAP_ONE_LINE(x) (((x)&0xffffffff)<<0)
-#define m_MMU_ZAP_ONE_LINE (0xffffffff<<0)
-
-#define MMU_INT_RAWSTAT (0x0314)
-#define v_PAGE_FAULT_RAWSTAT(x) (((x)&1)<<0)
-#define v_READ_BUS_ERROR_RAWSTAT(x) (((x)&1)<<1)
-#define m_PAGE_FAULT_RAWSTAT (1<<0)
-#define m_READ_BUS_ERROR_RAWSTAT (1<<1)
-
-#define MMU_INT_CLEAR (0x0318)
-#define v_PAGE_FAULT_CLEAR(x) (((x)&1)<<0)
-#define v_READ_BUS_ERROR_CLEAR(x) (((x)&1)<<1)
-#define m_PAGE_FAULT_CLEAR (1<<0)
-#define m_READ_BUS_ERROR_CLEAR (1<<1)
-
-#define MMU_INT_MASK (0x031c)
-#define v_PAGE_FAULT_MASK(x) (((x)&1)<<0)
-#define v_READ_BUS_ERROR_MASK(x) (((x)&1)<<1)
-#define m_PAGE_FAULT_MASK (1<<0)
-#define m_READ_BUS_ERROR_MASK (1<<1)
-
-#define MMU_INT_STATUS (0x0320)
-#define v_PAGE_FAULT_STATUS(x) (((x)&1)<<0)
-#define v_READ_BUS_ERROR_STATUS(x) (((x)&1)<<1)
-#define m_PAGE_FAULT_STATUS (1<<0)
-#define m_READ_BUS_ERROR_STATUS (1<<1)
-
-#define MMU_AUTO_GATING (0x0324)
-#define v_MMU_AUTO_GATING(x) (((x)&1)<<0)
-#define m_MMU_AUTO_GATING (1<<0)
-
-#define WIN2_LUT_ADDR (0x0400)
-#define WIN3_LUT_ADDR (0x0800)
-#define HWC_LUT_ADDR (0x0c00)
-#define GAMMA_LUT_ADDR (0x1000)
-#define MCU_BYPASS_WPORT (0x2200)
-#define MCU_BYPASS_RPORT (0x2300)
-
-#define PWM_MODE_ONE_SHOT (0x0)
-#define PWM_MODE_CONTINUOUS (0x1)
-#define PWM_MODE_CAPTURE (0x2)
-//#endif
-
-
-#define CalScale(x, y) ((((u32)(x-1))*0x1000)/(y-1))
-
-
-
-/*ALPHA BLENDING MODE*/
-enum alpha_mode { /* Fs Fd */
- AB_USER_DEFINE = 0x0,
- AB_CLEAR = 0x1,/* 0 0*/
- AB_SRC = 0x2,/* 1 0*/
- AB_DST = 0x3,/* 0 1 */
- AB_SRC_OVER = 0x4,/* 1 1-As''*/
- AB_DST_OVER = 0x5,/* 1-Ad'' 1*/
- AB_SRC_IN = 0x6,
- AB_DST_IN = 0x7,
- AB_SRC_OUT = 0x8,
- AB_DST_OUT = 0x9,
- AB_SRC_ATOP = 0xa,
- AB_DST_ATOP = 0xb,
- XOR = 0xc,
- AB_SRC_OVER_GLOBAL = 0xd
-}; /*alpha_blending_mode*/
-
-enum src_alpha_mode {
- AA_STRAIGHT = 0x0,
- AA_INVERSE = 0x1
-};/*src_alpha_mode*/
-
-enum global_alpha_mode {
- AA_GLOBAL = 0x0,
- AA_PER_PIX = 0x1,
- AA_PER_PIX_GLOBAL = 0x2
-};/*src_global_alpha_mode*/
-
-enum src_alpha_sel {
- AA_SAT = 0x0,
- AA_NO_SAT = 0x1
-};/*src_alpha_sel*/
-
-enum src_color_mode {
- AA_SRC_PRE_MUL = 0x0,
- AA_SRC_NO_PRE_MUL = 0x1
-};/*src_color_mode*/
-
-enum factor_mode {
- AA_ZERO = 0x0,
- AA_ONE = 0x1,
- AA_SRC = 0x2,
- AA_SRC_INVERSE = 0x3,
- AA_SRC_GLOBAL = 0x4
-};/*src_factor_mode && dst_factor_mode*/
-struct alpha_config{
- enum src_alpha_mode src_alpha_mode; /*win0_src_alpha_m0*/
- u32 src_global_alpha_val; /*win0_src_global_alpha*/
- enum global_alpha_mode src_global_alpha_mode;/*win0_src_blend_m0*/
- enum src_alpha_sel src_alpha_cal_m0; /*win0_src_alpha_cal_m0*/
- enum src_color_mode src_color_mode; /*win0_src_color_m0*/
- enum factor_mode src_factor_mode; /*win0_src_factor_m0*/
- enum factor_mode dst_factor_mode; /*win0_dst_factor_m0*/
-};
-
-
-static inline void lcdc_writel(struct fimd_context *ctx,u32 offset,u32 v)
-{
- u32 *_pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- *_pv = v;
- writel_relaxed(v,ctx->regs+offset);
-}
-
-static inline u32 lcdc_readl(struct fimd_context *ctx,u32 offset)
-{
- u32 v;
- u32 *_pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- v = readl_relaxed(ctx->regs+offset);
- *_pv = v;
- return v;
-}
-
-static inline u32 lcdc_read_bit(struct fimd_context *ctx,u32 offset,u32 msk)
-{
- u32 _v = readl_relaxed(ctx->regs+offset);
- _v &= msk;
- return (_v >> msk);
-}
-
-static inline void lcdc_set_bit(struct fimd_context *ctx,u32 offset,u32 msk)
-{
- u32* _pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- (*_pv) |= msk;
- writel_relaxed(*_pv,ctx->regs + offset);
-}
-
-static inline void lcdc_clr_bit(struct fimd_context *ctx,u32 offset,u32 msk)
-{
- u32* _pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- (*_pv) &= (~msk);
- writel_relaxed(*_pv,ctx->regs + offset);
-}
-
-static inline void lcdc_msk_reg(struct fimd_context *ctx,u32 offset,u32 msk,u32 v)
-{
- u32 *_pv = (u32*)ctx->regsbak;
- _pv += (offset >> 2);
- (*_pv) &= (~msk);
- (*_pv) |= v;
- writel_relaxed(*_pv,ctx->regs+offset);
-}
-
-static inline void lcdc_cfg_done(struct fimd_context *ctx)
-{
- writel_relaxed(0x01,ctx->regs+REG_CFG_DONE);
- dsb();
-}
projects / firefly-linux-kernel-4.4.55.git / commitdiff