rockchip,count-up = <1>;
};
+ watchdog:wdt@2004c000 {
+ compatible = "rockchip,watch dog";
+ reg = <0xff800000 0x100>;
+ clocks = <&pclk_pd_alive>;
+ clock-names = "pclk_wdt";
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,irq = <0>;
+ rockchip,timeout = <60>;
+ rockchip,atboot = <1>;
+ rockchip,debug = <0>;
+ status = "disable";
+ };
+
amba {
#address-cells = <1>;
#size-cells = <1>;
# ARM Architecture
-config RK29_WATCHDOG
- tristate "RK29 watchdog"
- help
- Watchdog timer embedded into RK29xx chips. This will reboot your
- system when the timeout is reached.
-
-config RK29_FEED_DOG_BY_INTE
- bool "feed watchdog by interrupt"
- depends on RK29_WATCHDOG
-
-config RK29_WATCHDOG_ATBOOT
- bool "start watchdog at system boot"
- depends on RK29_WATCHDOG
-
-config RK29_WATCHDOG_DEFAULT_TIME
- int "set watchdog time out value (unit second)"
- default 0
- depends on RK29_WATCHDOG
- help
- the real time out value is two times more than the setting value
-
-config RK29_WATCHDOG_DEBUG
- bool "enable watchdog debug"
- depends on RK29_WATCHDOG
-
config ARM_SP805_WATCHDOG
tristate "ARM SP805 Watchdog"
depends on ARM && ARM_AMBA
obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
obj-$(CONFIG_STMP3XXX_RTC_WATCHDOG) += stmp3xxx_rtc_wdt.o
obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
-obj-$(CONFIG_RK29_WATCHDOG) += rk29_wdt.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += rk29_wdt.o
obj-$(CONFIG_TS72XX_WATCHDOG) += ts72xx_wdt.o
obj-$(CONFIG_IMX2_WDT) += imx2_wdt.o
obj-$(CONFIG_UX500_WATCHDOG) += ux500_wdt.o
*/\r
\r
static int nowayout = WATCHDOG_NOWAYOUT;\r
-static int tmr_margin = CONFIG_RK29_WATCHDOG_DEFAULT_TIME;\r
+static int tmr_margin = 100;//CONFIG_RK29_WATCHDOG_DEFAULT_TIME;\r
#ifdef CONFIG_RK29_WATCHDOG_ATBOOT\r
static int tmr_atboot = 1;\r
#else\r