Teach DAGCombine to convert (sext x) to (zext x) when the

sign-bit of x is known to be zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 6ac549b9cf30e30af6533b9518b12a1842a5cd6b..dc59006fcfbe54ffd32315add3901b955b83d834 100644 (file)
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2887,6 +2887,10 @@ SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
     if (SCC.Val) return SCC;
   }
   
+  // fold (sext x) -> (zext x) if the sign bit is known zero.
+  if (DAG.SignBitIsZero(N0))
+    return DAG.getNode(ISD::ZERO_EXTEND, VT, N0);
+  
   return SDOperand();
 }