rk30: change gpll_clks frequency division, to achieve higher accuracy

diff --git a/arch/arm/mach-rk30/clock_data.c b/arch/arm/mach-rk30/clock_data.c
index f6332e8207ad29c22cf35a3a1722311056cc91cf..230c6b511c79fec80215b4b1e7a2f987ff9adeae 100755 (executable)
--- a/arch/arm/mach-rk30/clock_data.c
+++ b/arch/arm/mach-rk30/clock_data.c
@@ -1044,9 +1044,9 @@ static struct clk codec_pll_clk = {
 
 static const struct pll_clk_set gpll_clks[] = {
        _PLL_SET_CLKS(148500,   4,      99,     4),
-       _PLL_SET_CLKS(297000,   4,      99,     2),
-       _PLL_SET_CLKS(1188000,  2,      99,     2),
-       _PLL_SET_CLKS(0,                0,       0,     0),
+       _PLL_SET_CLKS(297000,   2,      99,     4),
+       _PLL_SET_CLKS(1188000,  1,      99,     2),
+       _PLL_SET_CLKS(0,        0,       0,     0),
 };
 static struct _pll_data gpll_data=SET_PLL_DATA(GPLL_ID,(void *)gpll_clks);
 static struct clk general_pll_clk = {