drm/i915: VLV_DDL is VLV only and needs an offset
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 24 Jan 2013 13:29:38 +0000 (15:29 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 24 Jan 2013 21:59:34 +0000 (22:59 +0100)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h

index 896946812e74b5eab13cd5f9326e81d6e349831c..3540a06743eec999568966ad0bf1dc4666911c76 100644 (file)
 /* drain latency register values*/
 #define DRAIN_LATENCY_PRECISION_32     32
 #define DRAIN_LATENCY_PRECISION_16     16
-#define VLV_DDL1                       0x70050
+#define VLV_DDL1                       (VLV_DISPLAY_BASE + 0x70050)
 #define DDL_CURSORA_PRECISION_32       (1<<31)
 #define DDL_CURSORA_PRECISION_16       (0<<31)
 #define DDL_CURSORA_SHIFT              24
 #define DDL_PLANEA_PRECISION_32                (1<<7)
 #define DDL_PLANEA_PRECISION_16                (0<<7)
-#define VLV_DDL2                       0x70054
+#define VLV_DDL2                       (VLV_DISPLAY_BASE + 0x70054)
 #define DDL_CURSORB_PRECISION_32       (1<<31)
 #define DDL_CURSORB_PRECISION_16       (0<<31)
 #define DDL_CURSORB_SHIFT              24