Now that all ARM subtargets use frame index scavenging, the Thumb1 requires*
authorJim Grosbach <grosbach@apple.com>
Tue, 20 Oct 2009 01:32:47 +0000 (01:32 +0000)
committerJim Grosbach <grosbach@apple.com>
Tue, 20 Oct 2009 01:32:47 +0000 (01:32 +0000)
functions are not needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84587 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/Thumb1RegisterInfo.cpp
lib/Target/ARM/Thumb1RegisterInfo.h

index 7e1fc572df612a100126866a389a8bfe04628ada..f548b055ca3422576143c9ccbb08bc760e71302a 100644 (file)
@@ -77,18 +77,6 @@ Thumb1RegisterInfo::getPhysicalRegisterRegClass(unsigned Reg, EVT VT) const {
   return TargetRegisterInfo::getPhysicalRegisterRegClass(Reg, VT);
 }
 
-bool
-Thumb1RegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
-  return true;
-}
-
-bool
-Thumb1RegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF)
-  const {
-  return true;
-}
-
-
 bool Thumb1RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
   const MachineFrameInfo *FFI = MF.getFrameInfo();
   unsigned CFSize = FFI->getMaxCallFrameSize();
index 570a5bc8c2ec1705bc8c6b5e0fee4500db496982..241f1cc7ea1c4f7ddf537b43f969d9b12a22ee00 100644 (file)
@@ -40,9 +40,6 @@ public:
   const TargetRegisterClass *
     getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
 
-  bool requiresRegisterScavenging(const MachineFunction &MF) const;
-  bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
-
   bool hasReservedCallFrame(MachineFunction &MF) const;
 
   void eliminateCallFramePseudoInstr(MachineFunction &MF,