ARM: dts: OMAP4/5: Use existing constants for IRQs
authorFlorian Vaussard <florian.vaussard@epfl.ch>
Fri, 31 May 2013 12:32:57 +0000 (14:32 +0200)
committerBenoit Cousson <benoit.cousson@linaro.org>
Tue, 18 Jun 2013 23:53:39 +0000 (18:53 -0500)
Use the constants defined in include/dt-bindings/interrupt-controller/
to enhance readability.

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
arch/arm/boot/dts/omap4-panda-common.dtsi
arch/arm/boot/dts/omap4-sdp.dts
arch/arm/boot/dts/omap4-var-som.dts
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap4460.dtsi
arch/arm/boot/dts/omap5.dtsi

index f5bec4d0a6faf52e870c6fa22d9a774bdff827fb..8d09cf55925db0541fb5b53d2a9376195c58d7c2 100644 (file)
 
        twl: twl@48 {
                reg = <0x48>;
-               /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
-               interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
+               /* IRQ# = 7 */
+               interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
                interrupt-parent = <&gic>;
        };
 
        twl6040: twl@4b {
                compatible = "ti,twl6040";
                reg = <0x4b>;
-               /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
-               interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
+               /* IRQ# = 119 */
+               interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
                interrupt-parent = <&gic>;
                ti,audpwron-gpio = <&gpio4 31 0>;  /* gpio line 127 */
 
index 7a2619470e8be92c32ac38003c3e450c46de5ec1..e9df3ea3583473b011d3ee8248b48568761cd096 100644 (file)
        twl: twl@48 {
                reg = <0x48>;
                /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
-               interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
+               interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
                interrupt-parent = <&gic>;
        };
 
                compatible = "ti,twl6040";
                reg = <0x4b>;
                /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
-               interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
+               interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
                interrupt-parent = <&gic>;
                ti,audpwron-gpio = <&gpio4 31 0>;  /* gpio line 127 */
 
                spi-max-frequency = <24000000>;
                reg = <0>;
                interrupt-parent = <&gpio2>;
-               interrupts = <2 8>; /* gpio line 34, low triggered */
+               interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */
                vdd-supply = <&vdd_eth>;
        };
 };
index 6593607bf2a604b352cdcdb9043a23221b16d08d..b41269e871dd2bc6f33a093010c4bd428713498b 100644 (file)
@@ -34,7 +34,7 @@
        twl: twl@48 {
                reg = <0x48>;
                /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
-               interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
+               interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
                interrupt-parent = <&gic>;
        };
 };
@@ -68,7 +68,7 @@
                spi-max-frequency = <24000000>;
                reg = <0>;
                interrupt-parent = <&gpio6>;
-               interrupts = <11 8>; /* gpio line 171, low triggered */
+               interrupts = <11 IRQ_TYPE_LEVEL_LOW>; /* gpio line 171 */
                vdd-supply = <&vdd_eth>;
        };
 };
index 4160d7d8db48c9f24f86e7bef9321a4fd3c29b19..6137aff7dd3beed5ee09c51b9d63a37b48ac0d8b 100644 (file)
@@ -7,6 +7,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
 
@@ -50,7 +51,7 @@
        local-timer@0x48240600 {
                compatible = "arm,cortex-a9-twd-timer";
                reg = <0x48240600 0x20>;
-               interrupts = <1 13 0x304>;
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
        };
 
        /*
@@ -91,8 +92,8 @@
                reg = <0x44000000 0x1000>,
                      <0x44800000 0x2000>,
                      <0x45000000 0x1000>;
-               interrupts = <0 9 0x4>,
-                            <0 10 0x4>;
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 
                counter32k: counter@4a304000 {
                        compatible = "ti,omap-counter32k";
                sdma: dma-controller@4a056000 {
                        compatible = "ti,omap4430-sdma";
                        reg = <0x4a056000 0x1000>;
-                       interrupts = <0 12 0x4>,
-                                    <0 13 0x4>,
-                                    <0 14 0x4>,
-                                    <0 15 0x4>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
                        #dma-channels = <32>;
                        #dma-requests = <127>;
                gpio1: gpio@4a310000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4a310000 0x200>;
-                       interrupts = <0 29 0x4>;
+                       interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio1";
                        ti,gpio-always-on;
                        gpio-controller;
                gpio2: gpio@48055000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48055000 0x200>;
-                       interrupts = <0 30 0x4>;
+                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio2";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio3: gpio@48057000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48057000 0x200>;
-                       interrupts = <0 31 0x4>;
+                       interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio3";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio4: gpio@48059000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48059000 0x200>;
-                       interrupts = <0 32 0x4>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio4";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio5: gpio@4805b000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4805b000 0x200>;
-                       interrupts = <0 33 0x4>;
+                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio5";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio6: gpio@4805d000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4805d000 0x200>;
-                       interrupts = <0 34 0x4>;
+                       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio6";
                        gpio-controller;
                        #gpio-cells = <2>;
                        reg = <0x50000000 0x1000>;
                        #address-cells = <2>;
                        #size-cells = <1>;
-                       interrupts = <0 20 0x4>;
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                        gpmc,num-cs = <8>;
                        gpmc,num-waitpins = <4>;
                        ti,hwmods = "gpmc";
                uart1: serial@4806a000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806a000 0x100>;
-                       interrupts = <0 72 0x4>;
+                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart1";
                        clock-frequency = <48000000>;
                };
                uart2: serial@4806c000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806c000 0x100>;
-                       interrupts = <0 73 0x4>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart2";
                        clock-frequency = <48000000>;
                };
                uart3: serial@48020000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x48020000 0x100>;
-                       interrupts = <0 74 0x4>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart3";
                        clock-frequency = <48000000>;
                };
                uart4: serial@4806e000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806e000 0x100>;
-                       interrupts = <0 70 0x4>;
+                       interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart4";
                        clock-frequency = <48000000>;
                };
                i2c1: i2c@48070000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48070000 0x100>;
-                       interrupts = <0 56 0x4>;
+                       interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c1";
                i2c2: i2c@48072000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48072000 0x100>;
-                       interrupts = <0 57 0x4>;
+                       interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c2";
                i2c3: i2c@48060000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48060000 0x100>;
-                       interrupts = <0 61 0x4>;
+                       interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c3";
                i2c4: i2c@48350000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48350000 0x100>;
-                       interrupts = <0 62 0x4>;
+                       interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c4";
                mcspi1: spi@48098000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x48098000 0x200>;
-                       interrupts = <0 65 0x4>;
+                       interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi1";
                mcspi2: spi@4809a000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x4809a000 0x200>;
-                       interrupts = <0 66 0x4>;
+                       interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi2";
                mcspi3: spi@480b8000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x480b8000 0x200>;
-                       interrupts = <0 91 0x4>;
+                       interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi3";
                mcspi4: spi@480ba000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x480ba000 0x200>;
-                       interrupts = <0 48 0x4>;
+                       interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi4";
                mmc1: mmc@4809c000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x4809c000 0x400>;
-                       interrupts = <0 83 0x4>;
+                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc1";
                        ti,dual-volt;
                        ti,needs-special-reset;
                mmc2: mmc@480b4000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480b4000 0x400>;
-                       interrupts = <0 86 0x4>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc2";
                        ti,needs-special-reset;
                        dmas = <&sdma 47>, <&sdma 48>;
                mmc3: mmc@480ad000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480ad000 0x400>;
-                       interrupts = <0 94 0x4>;
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc3";
                        ti,needs-special-reset;
                        dmas = <&sdma 77>, <&sdma 78>;
                mmc4: mmc@480d1000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480d1000 0x400>;
-                       interrupts = <0 96 0x4>;
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc4";
                        ti,needs-special-reset;
                        dmas = <&sdma 57>, <&sdma 58>;
                mmc5: mmc@480d5000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480d5000 0x400>;
-                       interrupts = <0 59 0x4>;
+                       interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc5";
                        ti,needs-special-reset;
                        dmas = <&sdma 59>, <&sdma 60>;
                wdt2: wdt@4a314000 {
                        compatible = "ti,omap4-wdt", "ti,omap3-wdt";
                        reg = <0x4a314000 0x80>;
-                       interrupts = <0 80 0x4>;
+                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "wd_timer2";
                };
 
                        reg = <0x40132000 0x7f>, /* MPU private access */
                              <0x49032000 0x7f>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 112 0x4>;
+                       interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mcpdm";
                        dmas = <&sdma 65>,
                               <&sdma 66>;
                        reg = <0x4012e000 0x7f>, /* MPU private access */
                              <0x4902e000 0x7f>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 114 0x4>;
+                       interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "dmic";
                        dmas = <&sdma 67>;
                        dma-names = "up_link";
                        reg = <0x40122000 0xff>, /* MPU private access */
                              <0x49022000 0xff>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 17 0x4>;
+                       interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "common";
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp1";
                        reg = <0x40124000 0xff>, /* MPU private access */
                              <0x49024000 0xff>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 22 0x4>;
+                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "common";
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp2";
                        reg = <0x40126000 0xff>, /* MPU private access */
                              <0x49026000 0xff>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 23 0x4>;
+                       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "common";
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp3";
                        compatible = "ti,omap4-mcbsp";
                        reg = <0x48096000 0xff>; /* L4 Interconnect */
                        reg-names = "mpu";
-                       interrupts = <0 16 0x4>;
+                       interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "common";
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp4";
                keypad: keypad@4a31c000 {
                        compatible = "ti,omap4-keypad";
                        reg = <0x4a31c000 0x80>;
-                       interrupts = <0 120 0x4>;
+                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
                        reg-names = "mpu";
                        ti,hwmods = "kbd";
                };
                emif1: emif@4c000000 {
                        compatible = "ti,emif-4d";
                        reg = <0x4c000000 0x100>;
-                       interrupts = <0 110 0x4>;
+                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "emif1";
                        phy-type = <1>;
                        hw-caps-read-idle-ctrl;
                emif2: emif@4d000000 {
                        compatible = "ti,emif-4d";
                        reg = <0x4d000000 0x100>;
-                       interrupts = <0 111 0x4>;
+                       interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "emif2";
                        phy-type = <1>;
                        hw-caps-read-idle-ctrl;
                timer1: timer@4a318000 {
                        compatible = "ti,omap3430-timer";
                        reg = <0x4a318000 0x80>;
-                       interrupts = <0 37 0x4>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer1";
                        ti,timer-alwon;
                };
                timer2: timer@48032000 {
                        compatible = "ti,omap3430-timer";
                        reg = <0x48032000 0x80>;
-                       interrupts = <0 38 0x4>;
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer2";
                };
 
                timer3: timer@48034000 {
                        compatible = "ti,omap4430-timer";
                        reg = <0x48034000 0x80>;
-                       interrupts = <0 39 0x4>;
+                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer3";
                };
 
                timer4: timer@48036000 {
                        compatible = "ti,omap4430-timer";
                        reg = <0x48036000 0x80>;
-                       interrupts = <0 40 0x4>;
+                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer4";
                };
 
                        compatible = "ti,omap4430-timer";
                        reg = <0x40138000 0x80>,
                              <0x49038000 0x80>;
-                       interrupts = <0 41 0x4>;
+                       interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer5";
                        ti,timer-dsp;
                };
                        compatible = "ti,omap4430-timer";
                        reg = <0x4013a000 0x80>,
                              <0x4903a000 0x80>;
-                       interrupts = <0 42 0x4>;
+                       interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer6";
                        ti,timer-dsp;
                };
                        compatible = "ti,omap4430-timer";
                        reg = <0x4013c000 0x80>,
                              <0x4903c000 0x80>;
-                       interrupts = <0 43 0x4>;
+                       interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer7";
                        ti,timer-dsp;
                };
                        compatible = "ti,omap4430-timer";
                        reg = <0x4013e000 0x80>,
                              <0x4903e000 0x80>;
-                       interrupts = <0 44 0x4>;
+                       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer8";
                        ti,timer-pwm;
                        ti,timer-dsp;
                timer9: timer@4803e000 {
                        compatible = "ti,omap4430-timer";
                        reg = <0x4803e000 0x80>;
-                       interrupts = <0 45 0x4>;
+                       interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer9";
                        ti,timer-pwm;
                };
                timer10: timer@48086000 {
                        compatible = "ti,omap3430-timer";
                        reg = <0x48086000 0x80>;
-                       interrupts = <0 46 0x4>;
+                       interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer10";
                        ti,timer-pwm;
                };
                timer11: timer@48088000 {
                        compatible = "ti,omap4430-timer";
                        reg = <0x48088000 0x80>;
-                       interrupts = <0 47 0x4>;
+                       interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer11";
                        ti,timer-pwm;
                };
                usbhstll: usbhstll@4a062000 {
                        compatible = "ti,usbhs-tll";
                        reg = <0x4a062000 0x1000>;
-                       interrupts = <0 78 0x4>;
+                       interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "usb_tll_hs";
                };
 
                                compatible = "ti,ohci-omap3", "usb-ohci";
                                reg = <0x4a064800 0x400>;
                                interrupt-parent = <&gic>;
-                               interrupts = <0 76 0x4>;
+                               interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        usbhsehci: ehci@4a064c00 {
                                compatible = "ti,ehci-omap", "usb-ehci";
                                reg = <0x4a064c00 0x400>;
                                interrupt-parent = <&gic>;
-                               interrupts = <0 77 0x4>;
+                               interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };
 
                usb_otg_hs: usb_otg_hs@4a0ab000 {
                        compatible = "ti,omap4-musb";
                        reg = <0x4a0ab000 0x7ff>;
-                       interrupts = <0 92 0x4>, <0 93 0x4>;
+                       interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "mc", "dma";
                        ti,hwmods = "usb_otg_hs";
                        usb-phy = <&usb2_phy>;
index 41762c263a62d3844af422abc684c2439cd2b3b9..19628b171b013e7cbe2231cc8c8cc7c7b8508175 100644 (file)
@@ -25,8 +25,8 @@
 
        pmu {
                compatible = "arm,cortex-a9-pmu";
-               interrupts = <0 54 0x4>,
-                            <0 55 0x4>;
+               interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
                ti,hwmods = "debugss";
        };
 };
index fa3d5a043d931a4785da0f5df4455fecf7890ab5..c2f59dea4e55eaf405eb2b4fa30745e6705375bc 100644 (file)
@@ -8,6 +8,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
 
 
        timer {
                compatible = "arm,armv7-timer";
-               /* PPI secure/nonsecure IRQ, active low level-sensitive */
-               interrupts = <1 13 0x308>,
-                            <1 14 0x308>,
-                            <1 11 0x308>,
-                            <1 10 0x308>;
+               /* PPI secure/nonsecure IRQ */
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
                clock-frequency = <6144000>;
        };
 
@@ -84,8 +85,8 @@
                reg = <0x44000000 0x2000>,
                      <0x44800000 0x3000>,
                      <0x45000000 0x4000>;
-               interrupts = <0 9 0x4>,
-                            <0 10 0x4>;
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 
                counter32k: counter@4ae04000 {
                        compatible = "ti,omap-counter32k";
                sdma: dma-controller@4a056000 {
                        compatible = "ti,omap4430-sdma";
                        reg = <0x4a056000 0x1000>;
-                       interrupts = <0 12 0x4>,
-                                    <0 13 0x4>,
-                                    <0 14 0x4>,
-                                    <0 15 0x4>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
                        #dma-channels = <32>;
                        #dma-requests = <127>;
                gpio1: gpio@4ae10000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4ae10000 0x200>;
-                       interrupts = <0 29 0x4>;
+                       interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio1";
                        ti,gpio-always-on;
                        gpio-controller;
                gpio2: gpio@48055000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48055000 0x200>;
-                       interrupts = <0 30 0x4>;
+                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio2";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio3: gpio@48057000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48057000 0x200>;
-                       interrupts = <0 31 0x4>;
+                       interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio3";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio4: gpio@48059000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48059000 0x200>;
-                       interrupts = <0 32 0x4>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio4";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio5: gpio@4805b000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4805b000 0x200>;
-                       interrupts = <0 33 0x4>;
+                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio5";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio6: gpio@4805d000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4805d000 0x200>;
-                       interrupts = <0 34 0x4>;
+                       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio6";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio7: gpio@48051000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48051000 0x200>;
-                       interrupts = <0 35 0x4>;
+                       interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio7";
                        gpio-controller;
                        #gpio-cells = <2>;
                gpio8: gpio@48053000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x48053000 0x200>;
-                       interrupts = <0 121 0x4>;
+                       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "gpio8";
                        gpio-controller;
                        #gpio-cells = <2>;
                        reg = <0x50000000 0x1000>;
                        #address-cells = <2>;
                        #size-cells = <1>;
-                       interrupts = <0 20 0x4>;
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                        gpmc,num-cs = <8>;
                        gpmc,num-waitpins = <4>;
                        ti,hwmods = "gpmc";
                i2c1: i2c@48070000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48070000 0x100>;
-                       interrupts = <0 56 0x4>;
+                       interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c1";
                i2c2: i2c@48072000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48072000 0x100>;
-                       interrupts = <0 57 0x4>;
+                       interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c2";
                i2c3: i2c@48060000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x48060000 0x100>;
-                       interrupts = <0 61 0x4>;
+                       interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c3";
                i2c4: i2c@4807a000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x4807a000 0x100>;
-                       interrupts = <0 62 0x4>;
+                       interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c4";
                i2c5: i2c@4807c000 {
                        compatible = "ti,omap4-i2c";
                        reg = <0x4807c000 0x100>;
-                       interrupts = <0 60 0x4>;
+                       interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c5";
                mcspi1: spi@48098000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x48098000 0x200>;
-                       interrupts = <0 65 0x4>;
+                       interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi1";
                mcspi2: spi@4809a000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x4809a000 0x200>;
-                       interrupts = <0 66 0x4>;
+                       interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi2";
                mcspi3: spi@480b8000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x480b8000 0x200>;
-                       interrupts = <0 91 0x4>;
+                       interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi3";
                mcspi4: spi@480ba000 {
                        compatible = "ti,omap4-mcspi";
                        reg = <0x480ba000 0x200>;
-                       interrupts = <0 48 0x4>;
+                       interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "mcspi4";
                uart1: serial@4806a000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806a000 0x100>;
-                       interrupts = <0 72 0x4>;
+                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart1";
                        clock-frequency = <48000000>;
                };
                uart2: serial@4806c000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806c000 0x100>;
-                       interrupts = <0 73 0x4>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart2";
                        clock-frequency = <48000000>;
                };
                uart3: serial@48020000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x48020000 0x100>;
-                       interrupts = <0 74 0x4>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart3";
                        clock-frequency = <48000000>;
                };
                uart4: serial@4806e000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x4806e000 0x100>;
-                       interrupts = <0 70 0x4>;
+                       interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart4";
                        clock-frequency = <48000000>;
                };
                uart5: serial@48066000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x48066000 0x100>;
-                       interrupts = <0 105 0x4>;
+                       interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart5";
                        clock-frequency = <48000000>;
                };
                uart6: serial@48068000 {
                        compatible = "ti,omap4-uart";
                        reg = <0x48068000 0x100>;
-                       interrupts = <0 106 0x4>;
+                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "uart6";
                        clock-frequency = <48000000>;
                };
                mmc1: mmc@4809c000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x4809c000 0x400>;
-                       interrupts = <0 83 0x4>;
+                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc1";
                        ti,dual-volt;
                        ti,needs-special-reset;
                mmc2: mmc@480b4000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480b4000 0x400>;
-                       interrupts = <0 86 0x4>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc2";
                        ti,needs-special-reset;
                        dmas = <&sdma 47>, <&sdma 48>;
                mmc3: mmc@480ad000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480ad000 0x400>;
-                       interrupts = <0 94 0x4>;
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc3";
                        ti,needs-special-reset;
                        dmas = <&sdma 77>, <&sdma 78>;
                mmc4: mmc@480d1000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480d1000 0x400>;
-                       interrupts = <0 96 0x4>;
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc4";
                        ti,needs-special-reset;
                        dmas = <&sdma 57>, <&sdma 58>;
                mmc5: mmc@480d5000 {
                        compatible = "ti,omap4-hsmmc";
                        reg = <0x480d5000 0x400>;
-                       interrupts = <0 59 0x4>;
+                       interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mmc5";
                        ti,needs-special-reset;
                        dmas = <&sdma 59>, <&sdma 60>;
                        reg = <0x40132000 0x7f>, /* MPU private access */
                              <0x49032000 0x7f>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 112 0x4>;
+                       interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "mcpdm";
                        dmas = <&sdma 65>,
                               <&sdma 66>;
                        reg = <0x4012e000 0x7f>, /* MPU private access */
                              <0x4902e000 0x7f>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 114 0x4>;
+                       interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "dmic";
                        dmas = <&sdma 67>;
                        dma-names = "up_link";
                        reg = <0x40122000 0xff>, /* MPU private access */
                              <0x49022000 0xff>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 17 0x4>;
+                       interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "common";
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp1";
                        reg = <0x40124000 0xff>, /* MPU private access */
                              <0x49024000 0xff>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 22 0x4>;
+                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "common";
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp2";
                        reg = <0x40126000 0xff>, /* MPU private access */
                              <0x49026000 0xff>; /* L3 Interconnect */
                        reg-names = "mpu", "dma";
-                       interrupts = <0 23 0x4>;
+                       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "common";
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp3";
                timer1: timer@4ae18000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x4ae18000 0x80>;
-                       interrupts = <0 37 0x4>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer1";
                        ti,timer-alwon;
                };
                timer2: timer@48032000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x48032000 0x80>;
-                       interrupts = <0 38 0x4>;
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer2";
                };
 
                timer3: timer@48034000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x48034000 0x80>;
-                       interrupts = <0 39 0x4>;
+                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer3";
                };
 
                timer4: timer@48036000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x48036000 0x80>;
-                       interrupts = <0 40 0x4>;
+                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer4";
                };
 
                        compatible = "ti,omap5430-timer";
                        reg = <0x40138000 0x80>,
                              <0x49038000 0x80>;
-                       interrupts = <0 41 0x4>;
+                       interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer5";
                        ti,timer-dsp;
                        ti,timer-pwm;
                        compatible = "ti,omap5430-timer";
                        reg = <0x4013a000 0x80>,
                              <0x4903a000 0x80>;
-                       interrupts = <0 42 0x4>;
+                       interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer6";
                        ti,timer-dsp;
                        ti,timer-pwm;
                        compatible = "ti,omap5430-timer";
                        reg = <0x4013c000 0x80>,
                              <0x4903c000 0x80>;
-                       interrupts = <0 43 0x4>;
+                       interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer7";
                        ti,timer-dsp;
                };
                        compatible = "ti,omap5430-timer";
                        reg = <0x4013e000 0x80>,
                              <0x4903e000 0x80>;
-                       interrupts = <0 44 0x4>;
+                       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer8";
                        ti,timer-dsp;
                        ti,timer-pwm;
                timer9: timer@4803e000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x4803e000 0x80>;
-                       interrupts = <0 45 0x4>;
+                       interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer9";
                        ti,timer-pwm;
                };
                timer10: timer@48086000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x48086000 0x80>;
-                       interrupts = <0 46 0x4>;
+                       interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer10";
                        ti,timer-pwm;
                };
                timer11: timer@48088000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x48088000 0x80>;
-                       interrupts = <0 47 0x4>;
+                       interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer11";
                        ti,timer-pwm;
                };
                wdt2: wdt@4ae14000 {
                        compatible = "ti,omap5-wdt", "ti,omap3-wdt";
                        reg = <0x4ae14000 0x80>;
-                       interrupts = <0 80 0x4>;
+                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "wd_timer2";
                };
 
                        ti,hwmods       = "emif1";
                        phy-type        = <2>; /* DDR PHY type: Intelli PHY */
                        reg = <0x4c000000 0x400>;
-                       interrupts = <0 110 0x4>;
+                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
                        hw-caps-read-idle-ctrl;
                        hw-caps-ll-interface;
                        hw-caps-temp-alert;
                        ti,hwmods       = "emif2";
                        phy-type        = <2>; /* DDR PHY type: Intelli PHY */
                        reg = <0x4d000000 0x400>;
-                       interrupts = <0 111 0x4>;
+                       interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
                        hw-caps-read-idle-ctrl;
                        hw-caps-ll-interface;
                        hw-caps-temp-alert;
                        compatible = "ti,dwc3";
                        ti,hwmods = "usb_otg_ss";
                        reg = <0x4a020000 0x1000>;
-                       interrupts = <0 93 4>;
+                       interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        utmi-mode = <2>;
                        dwc3@4a030000 {
                                compatible = "synopsys,dwc3";
                                reg = <0x4a030000 0x1000>;
-                               interrupts = <0 92 4>;
+                               interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
                                usb-phy = <&usb2_phy>, <&usb3_phy>;
                                tx-fifo-resize;
                        };