setOperationAction(ISD::BUILD_VECTOR, Ty, Custom);
setOperationAction(ISD::ADD, Ty, Legal);
+ setOperationAction(ISD::AND, Ty, Legal);
setOperationAction(ISD::CTLZ, Ty, Legal);
setOperationAction(ISD::MUL, Ty, Legal);
+ setOperationAction(ISD::OR, Ty, Legal);
setOperationAction(ISD::SDIV, Ty, Legal);
setOperationAction(ISD::SHL, Ty, Legal);
setOperationAction(ISD::SRA, Ty, Legal);
setOperationAction(ISD::SRL, Ty, Legal);
setOperationAction(ISD::SUB, Ty, Legal);
setOperationAction(ISD::UDIV, Ty, Legal);
+ setOperationAction(ISD::XOR, Ty, Legal);
}
// Enable MSA support for the given floating-point type and Register class.
case Intrinsic::mips_addv_w:
case Intrinsic::mips_addv_d:
return lowerMSABinaryIntr(Op, DAG, ISD::ADD);
+ case Intrinsic::mips_and_v:
+ return lowerMSABinaryIntr(Op, DAG, ISD::AND);
case Intrinsic::mips_bnz_b:
case Intrinsic::mips_bnz_h:
case Intrinsic::mips_bnz_w:
case Intrinsic::mips_nlzc_w:
case Intrinsic::mips_nlzc_d:
return lowerMSAUnaryIntr(Op, DAG, ISD::CTLZ);
+ case Intrinsic::mips_or_v:
+ return lowerMSABinaryIntr(Op, DAG, ISD::OR);
case Intrinsic::mips_sll_b:
case Intrinsic::mips_sll_h:
case Intrinsic::mips_sll_w:
case Intrinsic::mips_subv_w:
case Intrinsic::mips_subv_d:
return lowerMSABinaryIntr(Op, DAG, ISD::SUB);
+ case Intrinsic::mips_xor_v:
+ return lowerMSABinaryIntr(Op, DAG, ISD::XOR);
}
}
/// so it's possible for this to return false even when isConstantSplat returns
/// true.
static bool isSplatVector(const BuildVectorSDNode *N) {
- EVT VT = N->getValueType(0);
- assert(VT.isVector() && "Expected a vector type");
-
unsigned int nOps = N->getNumOperands();
assert(nOps > 1 && "isSplat has 0 or 1 sized build vector");