ARM: STi: DT: STiH407: Add dt nodes for sdhci and emmc.

The nodes have been split to allow as much commonality as possible.
The stih407 has a silicon bug with eMMC UHS modes (with top regs)
and as such doesn't have any of the uhs dt properties.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 655f8544a6734bb4467e662404d14ec79f309787..11d5c70b8d80b6d9b3f8e1071e3e622bf4c1cf00 100644 (file)
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -421,5 +421,35 @@
 
                        status = "disabled";
                };
+
+               mmc0: sdhci@09060000 {
+                       compatible = "st,sdhci-stih407", "st,sdhci";
+                       status = "disabled";
+                       reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
+                       reg-names = "mmc", "top-mmc-delay";
+                       interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
+                       interrupt-names = "mmcirq";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_mmc0>;
+                       clock-names = "mmc";
+                       clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
+                       bus-width = <8>;
+                       non-removable;
+               };
+
+               mmc1: sdhci@09080000 {
+                       compatible = "st,sdhci-stih407", "st,sdhci";
+                       status = "disabled";
+                       reg = <0x09080000 0x7ff>;
+                       reg-names = "mmc";
+                       interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
+                       interrupt-names = "mmcirq";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_sd1>;
+                       clock-names = "mmc";
+                       clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
+                       resets = <&softreset STIH407_MMC1_SOFTRESET>;
+                       bus-width = <4>;
+               };
        };
 };

diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts
index 2f61a9960dee60d129c7f6c4f84213769cc2856a..16f02c5e33a4682b690dc21288e0f6d88e4e9e3e 100644 (file)
--- a/arch/arm/boot/dts/stih410-b2120.dts
+++ b/arch/arm/boot/dts/stih410-b2120.dts
@@ -26,4 +26,14 @@
        aliases {
                ttyAS0 = &sbc_serial0;
        };
+
+       soc {
+
+               mmc0: sdhci@09060000 {
+                       max-frequency = <200000000>;
+                       sd-uhs-sdr50;
+                       sd-uhs-sdr104;
+                       sd-uhs-ddr50;
+               };
+       };
 };

diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index c1d859092be7f0397405466d8a3ac3aeccd15cd8..64fa0b5a0f244427161b30d439bed2c798de4079 100644 (file)
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -47,6 +47,14 @@
                        status = "okay";
                };
 
+               mmc0: sdhci@09060000 {
+                       status = "okay";
+               };
+
+               mmc1: sdhci@09080000 {
+                       status = "okay";
+               };
+
                /* SSC11 to HDMI */
                hdmiddc: i2c@9541000 {
                        status = "okay";