The MIPI controllers are part of the VIO power domain so add the
necessary property to indicate this for the controller we support.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I1d51ba1b91dcacb4dfbd6a23d3e609cb66b9426e
(cherry picked from commit
1946a201b3963b78a9e2123aedbdd11c4c4849dd)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
clock-names = "ref", "pclk";
+ power-domains = <&power RK3288_PD_VIO>;
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;