AArch64: add rev64 alias for 64-bit rev instruction.
authorTim Northover <tnorthover@apple.com>
Tue, 14 Jul 2015 17:07:29 +0000 (17:07 +0000)
committerTim Northover <tnorthover@apple.com>
Tue, 14 Jul 2015 17:07:29 +0000 (17:07 +0000)
It could be useful to assembly programmers and makes the permitted variants a
little more uniform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242164 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64InstrInfo.td
test/MC/AArch64/basic-a64-instructions.s

index 6d4cb2deebd8392ebac430fcbbe87770992c85ae..fa1a46acba848ee61e4e3a9275fcd81037adad41 100644 (file)
@@ -894,6 +894,8 @@ def REVXr   : OneXRegData<0b011, "rev", bswap>;
 def REV32Xr : OneXRegData<0b010, "rev32",
                                  UnOpFrag<(rotr (bswap node:$LHS), (i64 32))>>;
 
+def : InstAlias<"rev64 $Rd, $Rn", (REVXr GPR64:$Rd, GPR64:$Rn), 0>;
+
 // The bswap commutes with the rotr so we want a pattern for both possible
 // orders.
 def : Pat<(bswap (rotr GPR32:$Rn, (i64 16))), (REV16Wr GPR32:$Rn)>;
index 5d33a4f933b3d3ae17c71bc82009d70cc83e58a8..f8e49432145bd240ecd2b9bc76be78cb6a028a17 100644 (file)
@@ -1489,6 +1489,9 @@ _func:
 // CHECK: clz  w24, wzr                     // encoding: [0xf8,0x13,0xc0,0x5a]
 // CHECK: rev  x22, xzr                     // encoding: [0xf6,0x0f,0xc0,0xda]
 
+       rev64   x13, x12
+// CHECK: rev  x13, x12                     // encoding: [0x8d,0x0d,0xc0,0xda]
+
 //------------------------------------------------------------------------------
 // Data-processing (2 source)
 //------------------------------------------------------------------------------