rk3188 lcdc:add support for 1.8V io
authoryxj <yxj@rock-chips.com>
Thu, 31 Jan 2013 09:43:25 +0000 (17:43 +0800)
committeryxj <yxj@rock-chips.com>
Thu, 31 Jan 2013 13:40:56 +0000 (21:40 +0800)
drivers/video/rockchip/lcdc/Kconfig
drivers/video/rockchip/lcdc/rk3188_lcdc.c

index 7e20dc43c02c9d8deb4c91a6cef090e8d3e54c0d..a0f3322565b9cd4d84f9b5fe103f8f9785a5200f 100644 (file)
@@ -54,9 +54,23 @@ config LCDC0_RK3188
         depends on LCDC_RK3188
         help
           Support rk3188 lcdc0 if you say y here
+config LCDC0_IO_18V
+       bool "lcdc0 1.8v io support"
+       depends on LCDC0_RK3188
+       default n
+       help
+        LCDC0 io voltage is 1.8V if you say y here,the default voltage is 3.3V
 
 config LCDC1_RK3188
         bool "lcdc1 support"
         depends on LCDC_RK3188
         help
           Support rk3188 lcdc1 if you say y here
+
+config LCDC1_IO_18V
+        bool "lcdc1 1.8v io support"
+        depends on LCDC1_RK3188
+       default n
+        help
+         LCDC1 io voltage is 1.8V if you say y here,the default voltage is 3.3V
+
index eca913e6ee7e17dfb611084998879ed96ec61b4e..259f9c18c2b20e20bc2242cd7ff0cd6d2d5db8af 100644 (file)
@@ -264,8 +264,30 @@ static int rk3188_lcdc_init(struct rk_lcdc_device_driver *dev_drv)
        
        rk3188_lcdc_clk_enable(lcdc_dev);
 
+       if(lcdc_dev->id == 0)
+       {
+               v = readl_relaxed(RK30_GRF_BASE + GRF_IO_CON4);
+               #if defined(CONFIG_LCDC0_IO_18V)
+               v |= 0xffff4000;               //bit14: 1,1.8v;0,3.3v
+               writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
+               #else
+               v |= 0xffff0000;              
+               v &= 0xffffbfff;
+               writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
+               #endif
+       }
+
        if(lcdc_dev->id == 1) //iomux for lcdc1
        {
+               v = readl_relaxed(RK30_GRF_BASE + GRF_IO_CON4);
+               #if defined(CONFIG_LCDC1_IO_18V)
+               v |= 0xffff8000;               //bit14: 1,1.8v;0,3.3v
+               writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
+               #else
+               v |= 0xffff0000;              
+               v &= 0xffff7fff;
+               writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
+               #endif
                iomux_set(LCDC1_DCLK);
                iomux_set(LCDC1_DEN);
                iomux_set(LCDC1_HSYNC);