}
+
/// translateX86CC - do a one to one translation of a ISD::CondCode to the X86
/// specific condition code. It returns a false if it cannot do a direct
/// translation. X86CC is the translated CondCode. LHS/RHS are modified as
return true;
}
}
- }
- bool Flip = false;
- if (!isFP) {
switch (SetCCOpcode) {
default: break;
case ISD::SETEQ: X86CC = X86::COND_E; break;
// 0 | 0 | 1 | X < Y
// 1 | 0 | 0 | X == Y
// 1 | 1 | 1 | unordered
+ bool Flip = false;
switch (SetCCOpcode) {
default: break;
case ISD::SETUEQ:
case ISD::SETUO: X86CC = X86::COND_P; break;
case ISD::SETO: X86CC = X86::COND_NP; break;
}
- }
-
- if (X86CC == X86::COND_INVALID)
- return false;
-
- if (Flip)
- std::swap(LHS, RHS);
-
- if (isFP) {
- bool LHSCanFold = ISD::isNON_EXTLoad(LHS.getNode()) && LHS.hasOneUse();
- bool RHSCanFold = ISD::isNON_EXTLoad(RHS.getNode()) && RHS.hasOneUse();
- if (LHSCanFold && !RHSCanFold) {
- X86CC = X86::GetSwappedBranchCondition(static_cast<X86::CondCode>(X86CC));
+ if (Flip)
std::swap(LHS, RHS);
- }
}
- return true;
+ return X86CC != X86::COND_INVALID;
}
/// hasFPCMov - is there a floating point cmov for the specific X86 condition
}
}
-/// GetSwappedBranchCondition - Return the branch condition that would be
-/// the result of exchanging the two operands of a comparison without
-/// changing the result produced.
-/// e.g. COND_E to COND_E, COND_G -> COND_L
-X86::CondCode X86::GetSwappedBranchCondition(X86::CondCode CC) {
- switch (CC) {
- default: assert(0 && "Illegal condition code!");
- case X86::COND_E: return X86::COND_E;
- case X86::COND_NE: return X86::COND_NE;
- case X86::COND_L: return X86::COND_G;
- case X86::COND_LE: return X86::COND_GE;
- case X86::COND_G: return X86::COND_L;
- case X86::COND_GE: return X86::COND_LE;
- case X86::COND_B: return X86::COND_A;
- case X86::COND_BE: return X86::COND_AE;
- case X86::COND_A: return X86::COND_B;
- case X86::COND_AE: return X86::COND_BE;
- case X86::COND_P: return X86::COND_P;
- case X86::COND_NP: return X86::COND_NP;
- case X86::COND_O: return X86::COND_O;
- case X86::COND_NO: return X86::COND_NO;
- }
-}
-
bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
const TargetInstrDesc &TID = MI->getDesc();
if (!TID.isTerminator()) return false;
bool X86InstrInfo::
ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
assert(Cond.size() == 1 && "Invalid X86 branch condition!");
- X86::CondCode CC = static_cast<X86::CondCode>(Cond[0].getImm());
- Cond[0].setImm(GetOppositeBranchCondition(CC));
+ Cond[0].setImm(GetOppositeBranchCondition((X86::CondCode)Cond[0].getImm()));
return false;
}
/// e.g. turning COND_E to COND_NE.
CondCode GetOppositeBranchCondition(X86::CondCode CC);
- /// GetSwappedBranchCondition - Return the branch condition that would be
- /// the result of exchanging the two operands of a comparison without
- /// changing the result produced.
- /// e.g. COND_E to COND_E, COND_G -> COND_L
- CondCode GetSwappedBranchCondition(X86::CondCode CC);
}
/// X86II - This namespace holds all of the target specific flags that