powerpc/4xx: DTS: Add Add'l SDRAM0 Compatible and Interrupt Info
authorGrant Erickson <gerickson@nuovations.com>
Thu, 18 Dec 2008 12:34:05 +0000 (12:34 +0000)
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>
Tue, 20 Jan 2009 13:17:12 +0000 (08:17 -0500)
Added additional information for type and compatibility strings and
interrupt information to the SDRAM0 memory-controller device tree
nodes for AMCC PowerPC 405EX[r]-based boards to facilitate binding
with the new "ibm,sdram-4xx-ddr2" EDAC memory controller adapter driver.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
arch/powerpc/boot/dts/haleakala.dts
arch/powerpc/boot/dts/kilauea.dts
arch/powerpc/boot/dts/makalu.dts

index 513bc43a71afab17b8784cb7a71c1115f78ea9ee..5b2a4947bf82c092a4797cf5a7d0e06a0a8b6eed 100644 (file)
                clock-frequency = <0>; /* Filled in by U-Boot */
 
                SDRAM0: memory-controller {
-                       compatible = "ibm,sdram-405exr";
+                       compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
                        dcr-reg = <0x010 0x002>;
+                       interrupt-parent = <&UIC2>;
+                       interrupts = <0x5 0x4   /* ECC DED Error */ 
+                                     0x6 0x4>; /* ECC SEC Error */ 
                };
 
                MAL0: mcmal {
index dececc4b5ff280f8b40fc22be6c5bc8bdd5ac433..2804444812e5e75e0a0e19c7ea4c82ad92712700 100644 (file)
                clock-frequency = <0>; /* Filled in by U-Boot */
 
                SDRAM0: memory-controller {
-                       compatible = "ibm,sdram-405ex";
+                       compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
                        dcr-reg = <0x010 0x002>;
+                       interrupt-parent = <&UIC2>;
+                       interrupts = <0x5 0x4   /* ECC DED Error */ 
+                                     0x6 0x4>; /* ECC SEC Error */ 
                };
 
                MAL0: mcmal {
index 945508c7e7d8bbd9830876e8d708f56b92f0e6df..ffc246e726709460c42244831c71a95cbfe603bb 100644 (file)
                clock-frequency = <0>; /* Filled in by U-Boot */
 
                SDRAM0: memory-controller {
-                       compatible = "ibm,sdram-405ex";
+                       compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
                        dcr-reg = <0x010 0x002>;
+                       interrupt-parent = <&UIC2>;
+                       interrupts = <0x5 0x4 /* ECC DED Error */
+                                     0x6 0x4 /* ECC SEC Error */ >;
                };
 
                MAL0: mcmal {